Clock Synchronization Circuit for Multi-Clock Phase Alignment
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Solution Overview
Problem
Existing clock synchronization circuits fail to align the phases of two outputs generated from a single input using flip-flops, leading to misalignment and asynchronous operation.
Innovation Solution
A clock synchronization circuit that employs a signal generation circuit and a synchronization circuit with logical operations using AND and OR circuits to align the phases of the outputs, utilizing a synchronization enabling signal to correct phase misalignment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If two logic circuits generate outputs under different clocks from a single input signal, then the circuit can operate with multiple clock domains, but the phases of the two outputs become misaligned
Solution Approach 1:
The patent introduces a synchronization circuit as an intermediary component between the two logic circuits operating under different clocks. This synchronization circuit receives both outputs and applies logical operations (AND/OR) with a synchronization enabling signal to align their phases, effectively mediating the phase misalignment issue while preserving multi-clock domain operation capability
Solution Approach 2:
The synchronization circuit performs preliminary phase alignment operations on the outputs from the two logic circuits before they are used in subsequent operations. By pre-synchronizing the phases using logical operations with the synchronization enabling signal, the system ensures proper timing alignment is established in advance
2Manufacturing precision
If logical operations are performed to synchronize phases, then phase alignment is improved, but the circuit complexity increases
Solution Approach 1:
The synchronization function is segmented into distinct logical operation stages. The circuit uses separate AND circuits and OR circuits to perform different aspects of the synchronization operation, allowing each segment to be optimized independently while working together to achieve overall phase alignment
Solution Approach 2:
The synchronization circuit uses universal logical operations (AND and OR) that can handle multiple synchronization scenarios. The same logical operation structure can synchronize phases regardless of the specific clock frequency differences or timing relationships, providing a multi-functional solution that reduces overall circuit complexity
Data Source
AI summary
A clock synchronization circuit that includes a signal generation circuit configured to generate a first signal and a second signal by receiving a signal output under a first clock with two logic circuits that respectively operate under a second clock different from the first clock; and a synchronization circuit configured to receive the first signal, the second signal, and a synchronization enabling signal for adjusting phases of the first signal and the second signal, and control the phases of the first signal and the second signal using a first output result from a logical operation performed on the second signal and on a result of a logical operation with the first signal and the synchronization enabling signal, and using a second output result from a logical operation performed on the first signal and on a result of a logical operation with the second signal and the synchronization enabling signal.