Clock Synthesizer Voltage Droop Detection and Frequency Control
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Solution Overview
Problem
Central processing unit (CPU)/graphics processing unit (GPU) systems face challenges in maintaining optimal performance due to rapid fluctuations in current consumption, leading to voltage 'droop' issues, which existing clock stretching circuits do not adequately address.
Innovation Solution
A method and circuit design that includes a droop detector and clock stretching mechanism, where a portion of the oscillator control current is diverted in response to voltage droop, allowing the oscillator to reduce frequency and mitigate voltage droop effects, utilizing a frequency-locked loop (FLL) and shunt elements for efficient and fast response.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If clock stretching circuits are used to mitigate voltage droop, then voltage stability is improved, but response time to voltage fluctuations increases
Solution Approach 1:
The droop detector continuously monitors supply voltage and predicts droop conditions before they severely impact performance. By detecting voltage droop early and preemptively adjusting the clock frequency, the system mitigates performance degradation before it occurs, rather than reacting after the droop has already affected operation.
Solution Approach 2:
The system implements a closed-loop feedback mechanism where the droop detector continuously monitors supply voltage and feeds this information to the clock stretching circuit. This real-time feedback enables dynamic adjustment of clock frequency based on actual voltage conditions, optimizing both response time and voltage stability.
2Stability of the object's composition
If oscillator frequency is reduced to mitigate voltage droop, then voltage stability is improved, but computational productivity decreases
Solution Approach 1:
The clock stretching circuit dynamically adjusts oscillator frequency based on real-time voltage conditions rather than using a fixed reduced frequency. This dynamic adaptation allows the system to maintain maximum computational productivity when voltage is stable while automatically reducing frequency only when and where voltage droop occurs, optimizing the balance between stability and productivity.
Solution Approach 2:
The system applies frequency reduction locally and selectively to only those clock domains experiencing voltage droop, rather than uniformly reducing all clock frequencies. This localized approach maintains high productivity in unaffected areas while ensuring voltage stability in affected areas.
3Stability of the object's composition
If supply voltage is increased to account for voltage droop, then voltage stability is improved, but power consumption increases
Solution Approach 1:
The system replaces the traditional approach of increasing supply voltage (analog/power-intensive method) with a digital frequency adjustment mechanism. By substituting voltage scaling with clock frequency modulation, the system achieves voltage stability compensation without the associated power penalty, as frequency adjustment consumes significantly less power than voltage regulation.
Solution Approach 2:
The system changes the operational parameter from voltage magnitude to frequency modulation. Instead of altering the supply voltage parameter to compensate for droop, the system changes the clock frequency parameter, achieving the same stability goal through a different physical domain that consumes less energy.
Data Source
AI summary
A clock synthesizer has integrated voltage droop detection and clock stretching. An oscillator of the clock synthesizer receives a control current from a digital to analog converter and generates an oscillator output signal. A droop detector and clock stretching circuit responds to a voltage droop of a supply voltage supplying circuits coupled to the oscillator output signal, to cause a portion of the oscillator control current to be diverted from the oscillator to thereby cause the oscillator to reduce the first frequency. The diversion can be accomplished through shunt circuits or a current mirror circuit.