Matched capacitors in a nested deep-well LC circuit cut parasitic capacitance, widening tuning range and improving frequency stability.
A four-MOS differential varactor bridge expands VCO tuning range, improves jitter robustness, and compensates CMOS process variation.
Cascaded divider branches and a multiplexer extend fractional-N synthesizer tuning from 187.5 MHz to 3 GHz for multi-band transceivers.
Separate PLL and 1/2-divider paths shift difference frequencies beyond the tuner band to prevent spurious IF coupling in dual down converters.
Injection-locked push-push oscillators replace T/R phase shifters, cutting radar module loss, cost, weight, and receiver complexity.
Parallel conductor sections raise RTWO inductance and impedance, cutting power use and phase noise while keeping a compact layout.
A nonlinear whispering gallery mode resonator with opto-electronic feedback cuts phase noise and improves RF spectral purity.
A complex feedback divider uses quadrature multipliers to cut phase noise, widen frequency range, and support cascading at higher ratios.
An integrator and voltage comparator tune a Gm-C filter capacitor array precisely without changing tail current linearity.
A digitally switched capacitor array and steering logic widen VCO tuning range while limiting power use, jitter, and phase noise.
Mixing multiple input frequency ranges and selecting sidebands enables wideband local oscillator output with fast switching and low spurious signals.
A 90° clocked integrating comparator improves filter phase adjustment accuracy while limiting parasitic delay, chip area, and power.
A modulo-N counter and accumulator select reference clock edges to generate adjustable low-jitter clocks with lower power in multi-port systems.
Power-path switching lets the mixer choose divider outputs without signal-path switches, cutting parasitic loss and LO power use.
Clocked energy feeding through current-limiting resistors sustains LC oscillation in half-duplex transponders without distortion or frequency shift.
A switch-capacitor filter shares one fully differential amplifier with the ADC to cut power and circuit size without losing signal quality.
Cross-connected and self-connected balanced transconductors tune filter loss compensation while avoiding even-order harmonics.
Segmented varactors and switchable oscillator core elements keep VCO tuning sensitivity, transconductance, and phase noise stable across wide bands.
Stored high-resolution phase data lets DDS outputs change phase or frequency with finer control and shorter transients for accurate measurements.
A D-latch, integrator, comparator, and OR-gate suppress multiple digital glitches with controlled masking time while saving area and current.
A tunable LC filter with a varactor spreads clock frequency above and below center to cut GSM harmonic interference without added shielding.
A switchable element modifies dielectric permittivity to process electromagnetic waves directly.
A radiation type oscillator generates negative resistance to radiate high-frequency pulses and perform homodyne mixing within a single resonant cavity structure.
A shunt element with a series resistor and capacitor suppresses parasitic oscillations in terahertz wave oscillators.
Segmented CMOS varactor gates reduce fringe capacitance, increasing the Cmax/Cmin ratio by 60% and supporting high-speed I/O applications.
Segmented GaAs diode groups on a quartz substrate increase input power capacity while maintaining manageable circuit structure complexity.
An oscillator uses multi-functional terminals to inspect impedance values without adding dedicated inspection pads.
A YIG resonator in a voltage-controlled magnetic field provides simultaneous signal filtering and amplitude control.
A reference-feedback voltage drives a differential amplifier to produce a control voltage, ensuring accurate current sensing despite remote circuit variations.
Separating the bias circuit from the resonance unit suppresses parasitic oscillations, boosting terahertz wave output stability.
An event generator manages radar control signals to reduce digital signal processor workload.
Parallel spark gaps reduce plasma inductance, extending the frequency range above 600 MHz while maintaining structural simplicity.
A clock synthesizer uses a droop detector to divert oscillator control current, reducing frequency during supply voltage fluctuations.