Deep-Well Tunable Resonant Circuit for Wider Frequency Range

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Solution Overview

Problem

Tunable resonant circuits face limitations in their tuning range due to parasitic circuit elements, which restrict the adjustment of resonance frequency in response to manufacturing variations, temperature changes, and voltage fluctuations.

Innovation Solution

The implementation of a tunable resonant circuit design that includes matched capacitors and transistors with gate electrodes responsive to tuning signals, coupled with an inductor, and a biasing circuit with current mirrors to adjust capacitance and inductance, reducing parasitic capacitance and extending the tuning range by differential operation and binary-weighted capacitance layout.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If conventional resonant circuit design is used, then the circuit can function as a filter or oscillator, but the tuning range is limited due to parasitic circuit elements

Engineering Contradiction:
Improvetuning rangeVSAvoidparasitic capacitance
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The resonant circuit is divided into multiple parallel resonant circuits, each with its own inductor and capacitor. This segmentation allows each unit to be optimized independently and enables broader overall tuning range by combining multiple segments with different resonant frequencies.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements nested deep-well structures where a first well is disposed within a second well that is disposed within a substrate. This nesting arrangement minimizes parasitic capacitance by creating isolated regions that reduce unwanted electrical coupling to the substrate, thereby extending the tuning range.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If the tuning range is increased to compensate for manufacturing variations and operating conditions, then frequency stability improves, but parasitic elements limit the achievable tuning range

Engineering Contradiction:
Improvefrequency stabilityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The nested deep-well structure with a first well within a second well within a substrate creates isolated regions that minimize parasitic capacitance. This enables the resonant frequency to be tuned over a wider range to compensate for manufacturing variations, temperature changes, and voltage fluctuations while maintaining frequency stability.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The patent uses variable capacitors and variable inductors to dynamically change the resonant frequency parameter. By adjusting the capacitance and inductance values, the circuit can track application requirements and compensate for operating condition variations, achieving frequency stability across different conditions.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If deep-well arrangements are implemented to reduce parasitic capacitance, then tuning range increases, but device complexity increases

Engineering Contradiction:
Improvetuning rangeVSAvoiddeep-well arrangement complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The resonant circuit is divided into multiple parallel branches, each containing an inductor and capacitor. This segmentation allows the use of deep-well arrangements in each branch independently, reducing parasitic capacitance without requiring a single complex deep structure. The modular approach simplifies fabrication while achieving extended tuning range.

Inventive Principle:
Principle #1Segmentation

4Reliability

If matched capacitors are used in parallel resonant circuits, then quality factor improves, but circuit complexity increases

Engineering Contradiction:
Improvequality factorVSAvoidcircuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The circuit is divided into multiple parallel resonant circuits with matched capacitors. Each segment contributes to the overall quality factor, and the segmentation allows for modular design and fabrication. The matched capacitors in each parallel branch work together to enhance the total quality factor while maintaining a manageable circuit structure.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances the tuning range and frequency stability of resonant circuits, reducing parasitic capacitance and increasing inductance, thereby extending the frequency range of oscillators and improving quality factor, leading to reduced frequency jitter.

Implementation Method 1

resonant circuits are useful for various applications, such as filters and oscillators. The frequency of resonance can be adjusted in tunable resonant circuits

Methodology Applied
Scientific EffectResonance: Resonance

Implementation Method 2

Two varactor diodes can be coupled in series combination, and the inductor can be coupled across the series combination, wherein the varactor diodes can be responsive to a tuning signal

Methodology Applied
Scientific EffectVaractor effect: Capacitance

Data Source

PatentEP2628241B1Tunable resonant circuit in an integrated circuit
Publication Date: 2014.08.13 XILINX INC
  • EP2628241B1 patent drawingFigure 1
  • EP2628241B1 patent drawingFigure 2
  • EP2628241B1 patent drawingFigure 3

AI summary

A tunable resonant circuit (102) includes first capacitors (104, 108, 216, 228, 232) and second capacitors (106, 1 10, 218, 230, 234) that provide a matched capacitance between first and second electrodes of the first and second capacitors. A deep-well arrangement includes a first well (320, 326) disposed within a second well (322, 328) in a substrate (324). The first and second capacitors are each disposed on the first well. Two channel electrodes of a first transistor (120, 130) are respectively coupled to the second electrode (1 14, 304) of the first capacitor and the second electrode (1 18, 308) of the second capacitor. Two channel electrodes of a second transistor (122, 132) are respectively coupled to the second electrode of the first capacitor and to ground. Two channel electrodes of the third transistor (124, 134) are respectively coupled to the second electrode of the second capacitor and to ground. The gate electrodes (226, 314) of the first, second, and third transistors are responsive to a tuning signal (126, 136), and an inductor (144, 202) is coupled between the first electrodes (1 12, 1 16, 302, 306) of the first and second capacitors.