Clock Path Termination Resistance for 50% Duty Cycle Control

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Solution Overview

Problem

Semiconductor devices face challenges in maintaining a 50% duty cycle for clocks due to mismatched clock generators, external noise, and on-chip power noise, leading to distortion in high-pulse and low-pulse durations.

Innovation Solution

A semiconductor device that adjusts termination resistance values to control the common mode voltage level of clock paths, using impedance control signal generation units and processing units to generate signals that correct impedance values and thereby minimize duty cycle distortion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a duty cycle corrector is used to control the duty cycle of a clock, then the duty cycle can be adjusted, but it is difficult to maintain the duty cycle at 50% due to on-chip power noise

Engineering Contradiction:
Improveduty cycle control precisionVSAvoidduty cycle stability
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The patent changes the termination resistance value dynamically in response to detected duty cycle distortion. By adjusting the resistance parameter of the termination unit, the common mode voltage level is modified, which in turn corrects the duty cycle distortion caused by on-chip power noise and other disturbances, enabling reliable maintenance of 50% duty cycle

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements a feedback mechanism where duty cycle distortion is detected and used to control the termination resistance value. The detection unit monitors the duty cycle, and when distortion is detected, the control unit adjusts the termination resistance accordingly, creating a closed-loop system that maintains stable 50% duty cycle despite noise variations

Inventive Principle:
Principle #23Feedback

2Measurement precision

If the termination resistance value is changed to correct duty cycle distortion, then duty cycle accuracy is improved, but additional control mechanisms are required

Engineering Contradiction:
Improveduty cycle accuracyVSAvoidcontrol mechanism complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent introduces a termination unit as an intermediary component between the clock path and the correction mechanism. This termination unit, whose resistance can be adjusted, serves as a mediator that corrects duty cycle distortion by modifying the common mode voltage level, thereby improving duty cycle accuracy without requiring direct complex control of the clock generator

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent utilizes parameter changes in the termination resistance value as a simple yet effective means to correct duty cycle distortion. By varying this single parameter in response to detected distortion, accurate duty cycle control is achieved without implementing complex control algorithms or multiple active components

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS8575956B2Semiconductor device
Publication Date: 2013.11.05 SK HYNIX INC
  • US8575956B2 patent drawing
  • US8575956B2 patent drawing
  • US8575956B2 patent drawing

AI summary

A semiconductor device includes an impedance control signal generation unit configured to generate an impedance control signal for controlling an impedance value, a first processing unit configured to process the impedance control signal in response to a first setup value and generate a first process signal, a first clock termination unit configured to be coupled with a first clock path and determine an impedance value responding to the impedance control signal, and a second clock termination unit configured to be coupled with a second clock path and determine an impedance value responding to the first process signal.