Closed-Loop Ripple Filtering Circuit for High DC Accuracy
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Solution Overview
Problem
CMOS circuits suffer from large random mismatch that produces significant offset inhibiting precision circuit operations, and existing ripple removal methods require high modulation frequencies leading to residue errors due to clock feedthrough and charge injection, necessitating off-chip components for high accuracy applications.
Innovation Solution
An electric filtering circuitry with a closed-loop topology using a clocked integrator and sample-and-hold circuit to filter low-frequency ripples without external components, ensuring fast startup and high accuracy by integrating over a full period of the input signal and down-sampling to eliminate ripple transparency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If a high modulation frequency is used to achieve a high cutoff frequency filter for on-chip integration, then the filter capacitance and resistor values can be reduced, but residue errors due to clock feedthrough, charge injection and settling errors increase
Solution Approach 1:
The patent employs periodic chopping operation at a low modulation frequency to modulate random errors to a frequency beyond DC. The periodic action allows the use of low modulation frequency (e.g., 1 kHz) while still achieving effective ripple filtering through the combination of integrator and sample-and-hold circuitry, avoiding the residue errors associated with high frequency operation
Solution Approach 2:
The patent implements a feedback mechanism where the output of the sample-and-hold circuit is fed back to the summing node and subtracted from the input signal. This closed-loop feedback structure enables the system to maintain high DC accuracy by continuously correcting the output based on the difference between input and filtered output, while allowing the use of low modulation frequency without requiring large filter components
2Measurement precision
If a low modulation frequency is used to minimize residue errors, then DC accuracy is improved, but off-chip components are required which increases device complexity
Solution Approach 1:
The patent merges the filtering function with the existing chopping modulation structure by integrating an integrator circuit and a sample-and-hold circuit into the signal path. This combination allows the system to use low modulation frequency for high DC accuracy while maintaining on-chip integration, as the integrated circuits replace the need for separate off-chip filter components
Solution Approach 2:
The sample-and-hold circuit serves multiple functions: it holds the integrated value during the chopping period, provides ripple filtering, and enables down-sampling of the modulated signal. This multi-functionality allows the system to achieve high DC accuracy with low modulation frequency without requiring additional dedicated filter components, thus reducing device complexity
3Device complexity
If a traditional RC filter is used for ripple removal, then the filter design is simple, but the filter requires large capacitance and resistance values for low cutoff frequency which increases area
Solution Approach 1:
The patent replaces the traditional passive RC filter mechanism with an active integrator circuit using operational amplifiers, capacitors, and resistors configured in an integration topology. This substitution allows the system to achieve low cutoff frequency filtering with much smaller component values, as the integrator's transfer function depends on the product of resistance and capacitance over time rather than requiring large individual R or C values
Solution Approach 2:
The patent changes the filtering approach from frequency-domain RC filtering to time-domain integration. By using an integrator with a time constant tailored to the chopping frequency, the system achieves effective ripple rejection at low frequencies without requiring large R or C values. The integration period is synchronized with the chopping cycle, allowing small component values to achieve the same filtering effect that would require large components in a traditional RC filter
Data Source
AI summary
An electric filtering circuitry for filtering ripples of an input signal, includes an input terminal for applying the input signal, an output terminal to provide an output signal, and a forward path including a clocked integrator circuit and a clocked sample-and-hold or track-and-hold circuit. The electric filtering circuitry also includes a summing node that receives the input signal and the output signal, and provides a difference signal. The clocked integrator circuit has an input side connected to the summing node to receive the difference signal, and an output side to provide an integrator output signal. The clocked sample-and-hold or track-and-hold circuit has an input side to receive the integrator output signal, and an output side to provide a sample-and-hold or track-and-hold output signal. The output side of the sample-and-hold or track-and-hold circuit is coupled to the output terminal. A feedback path is between the output terminal and the summing node.