CMOS Image Sensor Amplifying Circuit With Repetitive Charge Accumulation
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Solution Overview
Problem
Existing CMOS image sensor amplifying circuits face challenges with gain variation due to electrostatic capacitance mismatch, leading to noise and increased power consumption and circuit surface area, especially when high gain is required.
Innovation Solution
The amplifying circuit employs a repetitive charge accumulation mechanism using capacitors to amplify the difference between two signals, allowing for independent gain setting without relying on capacitance ratios, thereby reducing power consumption and circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If large capacitors are used to achieve high gain amplification, then amplification factor is improved, but circuit surface area increases
Solution Approach 1:
The patent segments the amplification function into multiple stages: a first amplifying circuit performs initial amplification with a first capacitor, and a second amplifying circuit performs further amplification with a second capacitor. This segmentation allows high gain to be achieved through cascaded smaller-capacitor stages rather than a single large-capacitor stage, thereby reducing the required circuit surface area while maintaining high amplification factor.
2Power
If capacitance ratio is used to set gain, then amplification is achieved, but gain precision is limited by capacitance matching error
Solution Approach 1:
The patent employs feedback mechanisms in the amplifying circuits to stabilize and precisely control the gain. By using feedback loops, the circuit can compensate for capacitance matching errors and achieve more precise gain setting than would be possible with simple capacitance ratios alone.
3Power
If amplification is increased beyond 16 times, then signal strength is improved, but noise increases due to capacitance mismatch
Solution Approach 1:
By dividing the high-gain amplification into multiple smaller amplification stages, each stage operates with smaller capacitors that can be more precisely matched. This segmentation reduces the cumulative capacitance mismatch error that would occur in a single high-gain stage, thereby suppressing noise while achieving the required signal strength through cascaded amplification.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate gain setting independent of capacitance values, reducing noise and power consumption while maintaining high parallelism in image sensor systems.
Implementation Method 1
a first capacitor C1 provided between a first node N1 and a second node N2
Implementation Method 2
a first capacitor C1 provided between a first node N1 and a second node N2
Implementation Method 3
an operational amplifier 305 provided with a positive input terminal, a negative input terminal and an output terminal Ps
Data Source
AI summary
This invention is an amplification circuit which limits increased power consumption and circuit surface area use and an imaging device including this amplification circuit. After initially discharging a capacitor, a signal charge corresponding to the difference between pixel signals is transferred repeatedly to the capacitor during an integration phase storing a signal charge proportional to the number of repetitions. The output of amplification is the signal charge accumulated in the capacitor. The gain is independent of the capacitor capacitance ratio. Thus the capacitor size can be smaller than conventional amplification circuits.