CMOS Artificial Neuron Circuit with Subthreshold Bridge
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Solution Overview
Problem
Current artificial neuron circuits fail to meet the requirements of simplicity, low power consumption, high speed, and energy efficiency while replicating the electrical properties of biological neurons, especially in terms of surface area, voltage compatibility with living organisms, and energy efficiency, which are essential for bioinspired architectures.
Innovation Solution
The design of an artificial neuron circuit using a reduced number of transistors, operating below the threshold in standard CMOS technology, with low capacitance and low energy dissipation per pulse, capable of rapid operation and compatible with very low voltage, incorporating a bridge of PMOS and NMOS transistors with different conductance ratios to mimic sodium and potassium channels, and optionally featuring burst mode or stochastic resonance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If complex circuits with multiple transconductance operational amplifiers are used to reproduce Morris-Lecar model, then electrical properties of biological neurons are accurately reproduced, but device complexity and surface area increase significantly
Solution Approach 1:
The patent merges multiple separate circuit blocks (corresponding to different ionic currents) into a single integrated circuit. The PMOS and NMOS transistors are combined in a bridge configuration that simultaneously models calcium channels, potassium channels, and membrane leakage, eliminating the need for multiple discrete operational amplifiers and reducing overall circuit complexity while maintaining biological accuracy
Solution Approach 2:
The circuit employs universal building blocks (PMOS and NMOS transistors in bridge configuration) that can simultaneously represent multiple biological functions. The same transistor bridge structure models calcium current, potassium current, and membrane leakage properties, allowing a single circuit to perform multiple functions that previously required separate dedicated circuits for each ionic current
2Speed
If standard CMOS technology operating above threshold is used, then circuit performance and speed are improved, but energy consumption increases significantly
Solution Approach 1:
The patent changes the operating parameter of the transistors from above-threshold to below-threshold (subthreshold) operation. This parameter change enables the circuit to operate at very low energy consumption levels while maintaining functional performance. The subthreshold operation allows the circuit to achieve ultra-low power consumption suitable for bioinspired architectures, despite the traditionally slower speed of subthreshold transistors
3Reliability
If high supply voltage is used, then circuit operation is more reliable and faster, but compatibility with living organisms and energy efficiency decrease
Solution Approach 1:
The patent changes the supply voltage parameter from conventional high voltages to very low voltages (±100mV or less). This parameter change enables direct interfacing with living organisms while maintaining circuit functionality. The circuit is designed to operate reliably at these ultra-low voltages through careful selection of transistor dimensions and operating points, achieving both biological compatibility and functional reliability
4Adaptability or versatility
If circuits with large surface area are used, then more transistors and components can be integrated for complex functionality, but integration into VLSI neural networks becomes difficult
Solution Approach 1:
The patent merges multiple functionality into a compact single circuit. By combining calcium current modeling, potassium current modeling, and membrane leakage representation into one integrated circuit block, the design achieves complex neural functionality without requiring large surface area. This merging enables integration into VLSI neural networks with thousands of neurons
Solution Approach 2:
The circuit uses universal transistor bridge components that perform multiple functions simultaneously. The same PMOS and NMOS transistor bridge structures model different ionic currents and membrane properties, maximizing functional capability while minimizing the number of components and overall surface area required for implementation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed artificial neuron achieves significant reductions in surface area, energy consumption, and operational frequency, with energy efficiency improved by one to two orders of magnitude compared to existing circuits, enabling faithful reproduction of biological neuron behavior and potential applications in neuromorphic systems and biomedical implants.
Implementation Method 1
an artificial neuron comprising a membrane capacitance integrating an external excitation current
Implementation Method 2
operating below the threshold in standard CMOS technology
Data Source
Figure 1~2
Figure 3~4a
Figure 4b~4c
AI summary
The present invention relates to an artificial neuron (1;1') comprising: - a so-called membrane capacitor (Cm), - an input of so-called external synaptic excitation (Iex<sb />) in current, the membrane capacitor (Cm) integrating this input current, - a negative-feedback impulse circuit, supplied by a power supply (Vs, Vd) at the negative voltage (Vs) lying between -200 mV and 0 mV and at positive voltage (Vd) lying between 0 mV and +200 mV, comprising: ○ a bridge based on pMOS (8) and nMOS (7) transistors in series and linked by a midpoint (9) to the membrane capacitor (Cm), this midpoint (9) defining the output of the artificial neuron (1;1'), ○ at least one so-called delay capacitor (Cna, Ck) between the gate and the source of one of the transistors (7,8) of the bridge, at least two CMOS inverters (5,6; 10,11,12) between the membrane capacitor (Cm) and the gates of the transistors of said bridge.