CMOS Image Sensor N/P+ Substrate Isolation via Intermediary P-layer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS image sensors using N/P+ substrates face challenges such as electrical connection between photo diodes, increased leak current due to PN junction surfaces, and unstable pulse waveforms affecting image quality, particularly in high-resolution and high-speed applications.
Innovation Solution
A CMOS image sensor design with a semiconductor substrate having a P-type substrate main body and a first N-type semiconductor layer, where photoelectric converters are formed on the N-type epitaxial layer, and peripheral circuits are structured with P-type wells connected to the substrate main body to prevent electrical connection between photo diodes and stabilize pulse signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If an N/P+ substrate is used to increase photo diode sensitivity by enlarging depletion layers, then sensitivity is improved, but electrical connection between photo diodes occurs causing color mixture and blooming
Solution Approach 1:
A P-type semiconductor layer is introduced as an intermediary between the N-type epitaxial layer (containing photo diodes) and the P-type substrate main body. This intermediate P-type layer acts as an isolation barrier that prevents electrical connection between adjacent photo diodes, thereby eliminating color mixture and blooming while preserving the sensitivity benefits of the N/P+ substrate structure.
2Measurement precision
If N-type impurities are implanted into N-type epitaxial layer to form photo diodes, then depletion layers can be enlarged, but PN junction surfaces create leak current paths
Solution Approach 1:
The intermediate P-type semiconductor layer serves as a mediator that blocks leak current paths at the PN junction surfaces. By positioning this P-type layer between the N-type epitaxial layer and P-type substrate, it prevents the formation of continuous leak current paths while preserving the enlarged depletion layer characteristics necessary for high sensitivity.
3Device complexity
If peripheral circuits are formed on N-type epitaxial layer, then integration is achieved, but pulse waveforms become unstable affecting image quality
Solution Approach 1:
The invention applies local quality differentiation by forming peripheral circuits in specific regions with appropriate doping characteristics. The intermediate P-type layer provides locally optimized electrical properties that stabilize pulse waveforms for peripheral circuits while maintaining the N-type characteristics necessary for photo diode operation in the image pickup area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design effectively isolates photo diodes, reduces leak current, and stabilizes pulse waveforms, enhancing image quality by preventing color mixture, blooming, and maintaining high-frequency characteristics suitable for multi-pixel and high-speed applications.
Implementation Method 1
efficiently collecting electrons generated by photoelectric conversion onto photo diodes
Data Source
AI summary
A solid-state image pickup device includes a semiconductor substrate including a substrate main body having P-type impurities and a first N-type semiconductor layer provided on the substrate main body, an image pickup area including a plurality of photoelectric converters in which the plurality of photoelectric converters include second N-type semiconductor layers, the second N-type semiconductor layers being provided on a surface portion of the first N-type semiconductor layer independently of one another, and a first peripheral circuit area including a first P-type semiconductor layer formed on the first N-type semiconductor layer. The solid-state image pickup device further includes a second peripheral circuit area including a second P-type semiconductor layer formed on the first N-type semiconductor layer and connected to the substrate main body.