CMOS Image Sensor Light Sensitivity via Refractive Index Layers
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Solution Overview
Problem
CMOS image sensors face challenges with high power consumption and complex processing due to the need for numerous masks and complicated driving methods, and CCDs struggle with signal processing circuit integration and high power consumption.
Innovation Solution
A method for fabricating CMOS image sensors involving the formation of photodiodes and transistors with constant intervals, distinct refractive index interlayer insulating layers, color filters, and microlenses to enhance light sensitivity and reduce power consumption, using a silane-based material for the first interlayer and controlling the refractive index of subsequent layers to optimize light refraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple interlayer insulating layers with different refractive indexes are formed, then light sensitivity is improved, but manufacturing complexity increases
Solution Approach 1:
The patent applies parameter changes by varying the refractive index of interlayer insulating layers to optimize light sensitivity. Specifically, the first interlayer insulating layer has a refractive index of 1.46-1.50, while the second has 1.65-1.75, creating controlled optical parameter variations that enhance light collection efficiency without fundamentally changing the manufacturing process architecture
Solution Approach 2:
The patent uses composite materials by forming multiple interlayer insulating layers with different material compositions and refractive indexes. The first layer uses one material composition while the second layer uses a different composition, creating a composite structure that optimizes optical properties for improved light sensitivity
2Manufacturing precision
If photodiodes and transistors are formed with constant intervals, then manufacturing precision is improved, but device area increases
Solution Approach 1:
The patent applies local quality by forming photodiodes and transistors with constant intervals only in specific regions where precise positioning is critical for optical alignment, while other regions can have more flexible layouts. This allows manufacturing precision to be optimized locally without requiring the entire device to occupy excessive area
3Productivity
If microlenses are formed over color filters, then light collection efficiency is improved, but fabrication steps increase
Solution Approach 1:
The patent applies preliminary action by forming the interlayer insulating layers with optimized refractive indexes before forming the color filters and microlenses. This preliminary optimization of the optical path prepares the structure for more efficient light collection, allowing the subsequent microlens formation to be more effective without requiring additional fabrication steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the sensitivity and reduces power consumption of CMOS image sensors while simplifying the fabrication process, allowing for more efficient light collection and integration of processing circuits within a single chip.
Implementation Method 1
forming a plurality of interlayer insulating layers including an upper interlayer insulating layer and a lower interlayer insulating layer whose refractive indexes are different from each other
Implementation Method 2
forming a plurality of microlenses over the planarization layer such that the microlenses correspond to the color filters, respectively
Data Source
AI summary
An image sensor can include a plurality of photodiodes and a plurality of transistors formed in a semiconductor substrate; a first interlayer insulating layer formed over the semiconductor substrate; a plurality of metal lines formed over the first interlayer insulating layer, electrically connected with the photodiodes and the transistors; a plurality of interlayer insulating layers including an upper interlayer insulating layer and a lower interlayer insulating layer formed over the semiconductor substrate including the metal lines, wherein refractive indexes of the upper interlayer insulating layer and the lower interlayer insulating layer are different from each other; a plurality of color filters formed over the plurality of interlayer insulating layers and which correspond to the photodiodes, respectively; a planarization layer formed over the semiconductor substrate including the color filters; and a plurality of microlenses formed over the planarization layer and which corresponds to the color filters, respectively.