CMOS Input Stage Current Steering for Constant Transconductance
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Solution Overview
Problem
Conventional CMOS input stage circuits experience inconsistent transconductance when transitioning across the cross-over voltage boundary, leading to variable unity-gain bandwidth and phase margin degradation, which affects the stability of operational amplifiers.
Innovation Solution
The proposed CMOS input stage circuit incorporates a current steering circuit to distribute the tail current between complementary input pairs and a current stealing circuit to manage the current when the common-mode input voltage is near the cross-over voltage, maintaining near constant transconductance across the common-mode input voltage range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a current source supplies tail current to complementary input pairs in a CMOS input stage, then rail-to-rail common-mode input voltage swing is achieved, but transconductance becomes inconsistent when transitioning across the cross-over voltage boundary
Solution Approach 1:
The patent segments the tail current into multiple independent controllable current sources, each serving specific common-mode voltage ranges. Instead of a single tail current source, the circuit uses separate current sources for NMOS and PMOS input pairs, allowing independent control of current distribution across different operating regions, thereby maintaining consistent transconductance throughout the rail-to-rail common-mode input voltage swing.
Solution Approach 2:
The patent implements dynamic current steering mechanisms that automatically adjust the distribution of tail current between NMOS and PMOS input pairs based on the common-mode input voltage level. Current mirror circuits and control transistors dynamically redistribute current to maintain optimal transconductance in each operating region, transitioning smoothly across the cross-over voltage boundary without causing transconductance inconsistency.
2Adaptability or versatility
If transconductance varies across common-mode input voltage range, then amplifier bandwidth becomes variable, but amplifier stability deteriorates due to phase margin degradation
Solution Approach 1:
The patent systematically changes the operating parameters of the input stage by adjusting the tail current distribution between NMOS and PMOS pairs based on common-mode voltage level. By controlling the gate voltages of current mirror transistors and steering devices, the circuit maintains approximately constant transconductance across the entire common-mode input voltage range, ensuring stable amplifier bandwidth and preventing phase margin degradation.
3Stability of the object's composition
If conventional current steering circuits are used to maintain constant transconductance, then transconductance consistency improves, but phase margin drop occurs near the cross-over voltage boundary
Solution Approach 1:
The patent implements beforehand cushioning by designing overlapping current distribution regions and using smooth transition mechanisms in the current steering circuit. The circuit anticipates the cross-over voltage boundary transition and prepares current redistribution in advance, using multiple current sources with gradual handoff to prevent abrupt transconductance changes that would cause phase margin drop, thereby maintaining both transconductance consistency and phase margin stability.
Data Source
AI summary
Embodiments of improved CMOS input stage circuits and related methods are provided herein to maintain a near constant transconductance across an entire common-mode input voltage range of the input stage. One embodiment includes a pair of NMOS input transistors and a pair of PMOS input transistors, each coupled to receive a differential input voltages at their gate terminals; a current source coupled to source terminals of the pair of PMOS input transistors and configured to generate a current; a current steering circuit configured to steer the current to the pair of NMOS input transistors and/or to the pair of PMOS input transistors, depending on whether a common mode input voltage (CMV) is greater than, less than, or substantially equal to a cross-over voltage; and a current stealing circuit configured to reduce the current when the CMV is substantially equal to the cross-over voltage.