Swapped subphase integration keeps virtual grounds matched, cutting parasitic charge errors and speeding delta-sigma temperature conversion.
Buffers, current mirrors, and integrators cut parasitic capacitance effects in embedded touch displays to preserve sensitivity and SNR.
Inverted comparator outputs are fed back through resistors to suppress common-mode jitter without adding low-pass-filter noise or current.
Chopper-modulated integrator feedback cuts noise folding, offset, and flicker noise in sensor amplifiers while enabling direct sampling.
Current steering and current stealing keep CMOS input-stage transconductance nearly constant across common-mode crossover, reducing phase-margin drop.
By swapping amplifier and capacitor roles across subphases, this integrator cuts parasitic charge errors and voltage swings without slowing conversion.
A multiplexing circuit lets multiple LiDAR photodetectors share one low-noise amplifier, cutting power, footprint, and amplifier count.
Multi-stage chopper amplification cancels offset voltage and preserves signal integrity for detecting small resistance changes across wide common-mode inputs.
A dropout detector senses open-loop operation in an LDO and limits driver bias current to preserve output supply and extend battery life.
A three-stage current sense circuit uses staged sensing, amplification, and clamping to prevent oscillation from 150 mA to 18 A.
A dynamic common-mode adjustor shifts differential signal offset with input level to reduce low-signal noise, distortion, and power use.
Using a native MOSFET and feedback amplifier, this case shows how self-starting current reference circuits cut power and area.
A phased charge-transfer circuit uses a cancellation capacitor to null base capacitance and improve touch sensitivity without overshoot.
Multiple inner and outer electrodes with differential amplification prevent grip-induced closed loops and stabilize electric field communication.
Selectable CTIA feedback capacitors switch gain and enable CDS, reducing saturation and noise in image sensor readout across radiation levels.
DC loops with back-gate biased transistors replace AC coupling capacitors in a wideband LNA, cutting area while reducing noise and distortion.
Self-biased cascode transistors remove extra bias circuitry in a telescopic OTA, cutting power and area while improving CMRR, PSRR, and harmonic rejection.
High-impedance buffers at middle electrodes block current diversion, cancel common mode noise, and improve touch location accuracy.
Inductive LNA-mixer coupling, shunt feedback, and neutralization cut mm-wave front-end noise and power while improving matching and stability.
A bias circuit and common-mode feedback loop equalize push-pull quiescent currents to cut DC offsets and preserve Class AB efficiency.
A transconductance stage suppresses common-mode gain and fixes output common-mode voltage without sacrificing input impedance or noise.
Shared filter-amplifier and switching paths let one chip handle Wi-Fi and Bluetooth while reducing transceiver area and control complexity.
Manages parasitic capacitance in a chopper amplifier to preserve low-frequency signals and support stable low-voltage amplification.
A tunable LNA shifts resonance away from detected GPS jammers, easing LO phase-noise demands while cutting receiver power use.
Multiple self-biased differential amplifiers extend common-mode range from ground to VDD for more reliable differential clock input stages.
A dual-loop LDO feedback circuit boosts PSRR and bandwidth while maintaining low dropout even when output transistors enter triode region.
Input voltage is split into defined ranges and shifted to fixed operating points for linear ADC amplification without laborious calibration.
Dual detection of output slewing and input mismatch disables op-amp slew boost near the rail to prevent unnecessary current draw.
A resistor-current source reset scheme cancels sense amplifier offset while avoiding parasitic capacitance that would slow evaluation-node slew rates.
A complementary PMOS-NMOS preamp reuses current and biases output independently of supply noise to improve SNR and bandwidth.
Voltage clamping and cascode stages let thin film oxide transistors handle multiple DDR receiver standards while staying fast and within safe limits.
A T-network varistor trims differential-path gain mismatch to raise common-mode rejection without chopper circuit complexity or extra area.
A cascaded differential-pair op amp removes compensation feedback to cut delay, power use, and clipping recovery time in active RC filters.
A digitally controlled current source separates test and reference voltages to improve resistor code accuracy without ADC complexity.
Separate low-pass feedback paths suppress DC offset in differential Op-Amp outputs, cutting RF receiver complexity and hardware cost.
Cross-coupled common-mode rejection and differential threshold generation improve LOS accuracy, cutting false alerts and power use.
Current injection boosts telescopic amplifier bandwidth by cutting parasitic capacitance while preserving gain, power use, and circuit area.
A replicated differential pair regulates bias current to stabilize transconductance against process and temperature variation.
Capacitive common-mode compensation stabilizes differential amplifier biasing, reducing output error and current waste in low-power circuits.
Equalized DC and AC input impedances turn supply disturbance currents into common-mode signals, boosting differential receiver PSRR.
Separate feedback and buffer paths reject high common-mode voltage while preserving differential signal quality and bandwidth.
Switchable transistor groups and gain adjustment let an OTA self-calibrate post-manufacture to minimize input-referred offset.
Threshold-switched common-mode feedback stabilizes a pseudo-differential Class C amplifier without sacrificing bandwidth or settling time.
Back-gate coupling in folded cascode transistors boosts falling-edge slew rate without reducing phase compensation or raising bias current.