Differential Op-Amp Feedback for DC Offset Suppression
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing RF receivers face challenges with DC offset suppression, requiring complex and costly DC offset correction subsystems, which complicate the design and increase hardware costs due to the use of common-mode feedback circuits that do not effectively address DC offsets.
Innovation Solution
An operational amplifier circuit with DC offset suppression is introduced, featuring a fully differential architecture with separate low-frequency low-pass feedback circuits for each output signal, allowing for effective DC offset reduction without affecting the relevant signal components, thus eliminating the need for an additional DC offset correction subsystem.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a common-mode feedback circuit is used to suppress DC offset, then the DC offset is reduced, but the design complexity and hardware cost increase due to the need for additional correction subsystems
Solution Approach 1:
The patent combines the DC offset suppression function with the existing low-pass filter by integrating a DC blocking capacitor into the feedback path. This merging eliminates the need for separate DC offset correction subsystems while maintaining the filtering function, thereby reducing design complexity and hardware cost without sacrificing DC offset suppression capability
Solution Approach 2:
The feedback circuit is designed to serve multiple functions simultaneously: it provides both DC offset suppression through the DC blocking capacitor and signal filtering through the low-pass filter characteristics. This multi-functionality reduces the overall system complexity by eliminating dedicated DC correction hardware
2Object-affected harmful factors
If a DC offset correction subsystem is added to the RF receiver, then DC offset is suppressed, but hardware cost increases due to additional components and co-design requirements
Solution Approach 1:
The patent merges the DC offset correction functionality into the existing low-pass filter circuit by placing a DC blocking capacitor in the feedback path. This integration eliminates the need for separate DC correction subsystems with their associated comparators, digital state machines, and DACs, thereby reducing hardware cost and component count
Solution Approach 2:
The feedback circuit is designed to perform both DC offset suppression and signal filtering functions simultaneously. The DC blocking capacitor integrated into the low-pass filter enables the same hardware to address multiple issues, eliminating the need for dedicated DC correction hardware and reducing overall system cost
3Stability of the object's composition
If common-mode feedback is used, then the average of differential output signals is controlled, but DC offset is not effectively addressed since the average is DC offset free
Solution Approach 1:
The patent segments the feedback approach by implementing separate feedback paths for each differential output signal rather than a single common-mode feedback path. Each feedback path includes a DC blocking capacitor that independently suppresses DC offset for its respective signal, allowing effective DC offset correction while maintaining common-mode stability
Solution Approach 2:
The DC blocking capacitor acts as an intermediary element in the feedback path that blocks DC components while allowing AC signal components to pass. This intermediary enables the feedback circuit to suppress DC offset without interfering with the common-mode stability control function
Data Source
Figure 1
Figure 2
Figure 3
AI summary
An Op-Amp circuit (100), a low pass filter and a RF receiver using the Op-Amp circuit are provided. The Op-Amp circuit includes a first operational amplifier (110) and a feedback circuit (120; 130). The feedback circuit is coupled to an output stage (113) of the first operational amplifier and generates a feedback signal (fb1; fb2) according to a reference voltage (ref) and one of a pair of differential output signals out_p; out_n). The feedback circuit outputs the feedback signal to the output stage (113) to adjust a bias current of the output stage corresponding to the one of the pair of differential output signals, so that a DC voltage level of the one of the pair of differential output signals is close to a voltage level of the reference voltage (ref) and a DC offset of the one of the pair of differential output signals is suppressed.