Folded Cascode Op-Amp Back-Gate Coupling for Higher Slew Rate

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Solution Overview

Problem

Existing operational amplifier circuits face challenges in achieving high slew rates at falling edges of rectangular waves without increasing bias current, which is detrimental for power-efficient mobile devices, as reducing capacitance values is difficult and increasing charging currents is power-consuming.

Innovation Solution

A folded cascode operational amplifier circuit is designed with a PMOS differential pair, NMOS cascode-connected transistors, and a phase compensation capacitor, where the transistors' source and back gate are connected, allowing for increased current flow without raising bias current, thereby enhancing the slew rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the capacitance value of the phase compensation capacitor is reduced to increase the slew rate, then the slew rate is improved, but the phase compensation performance deteriorates

Engineering Contradiction:
Improveslew rateVSAvoidphase compensation performance
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent changes the electrical parameters of the circuit by connecting the back gates of cascode transistors to their sources, which modifies the transistor operating points and current distribution. This parameter change enables the circuit to achieve high slew rate with the original capacitance value, resolving the contradiction between slew rate improvement and phase compensation performance maintenance.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic current redistribution through the cascode circuit configuration. During large signal transitions, the cascode transistors dynamically adjust the current flow to rapidly charge/discharge the phase compensation capacitor, enabling high slew rate without requiring capacitor value reduction, thus maintaining phase compensation performance.

Inventive Principle:
Principle #15Dynamics

2Speed

If the bias current is increased to increase the charging current for the phase compensation capacitor, then the slew rate is improved, but the power consumption increases

Engineering Contradiction:
Improveslew rateVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent segments the current path by introducing cascode transistors between the differential pair and the load. This segmentation allows the bias current to be separated into different functional paths: one for maintaining steady-state operation and another for dynamic slew rate enhancement, thereby achieving high slew rate without proportionally increasing total power consumption.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The cascode transistors act as intermediaries that enable efficient current transfer during slewing operations. They provide a low-impedance path for charging the phase compensation capacitor during large signal transitions without requiring a proportional increase in bias current, thus improving slew rate while maintaining power efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If the basic two-stage operational amplifier configuration is used, then the circuit simplicity is maintained, but the slew rate at falling edges is insufficient

Engineering Contradiction:
Improvecircuit configurationVSAvoidslew rate
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The patent nests the cascode circuit structure within the basic two-stage operational amplifier configuration. The cascode transistors are inserted into the existing circuit topology, adding functionality for high slew rate while maintaining the overall simplicity of the two-stage architecture. This nested approach achieves performance improvement with minimal structural modification.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS9876477B2Operational amplifier circuit
Publication Date: 2018.01.23 FUJI ELECTRIC CO LTD
  • US9876477B2 patent drawing
  • US9876477B2 patent drawing
  • US9876477B2 patent drawing

AI summary

In a folded cascode operational amplifier circuit, a source is connected to a back gate in each of third and fourth transistors that are cascode-connected to first and second transistors, which are an electric current source that returns an electric current signal output by a differential pair of an input stage. In the third and fourth transistors, an active parasitic element exists due to its device structure. When a falling edge signal of a rectangular wave is input, and electric current is supplied to the source of the third transistor to increase its electric potential, electric current flows into the drain from the back gate via the active parasitic element in an on state, in order to rapidly charge a capacitor. Thereby, a fifth transistor turns on within a shorter time, in order to improve an internal slew rate.