Ultra-low-voltage CMOS Memory With Boosted Power Supplies
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Solution Overview
Problem
Conventional SRAMs and logic circuits in SoCs face challenges in operating at sub-0.5V voltages due to limitations in existing voltage boosting and gate-source differentially-driven schemes, which result in high power consumption, inefficiencies, and inability to maintain high speed and low power operations.
Innovation Solution
The proposed solution involves a memory architecture with cross-coupled inverters and boosted power supplies, along with gate-source differentially-driven circuits, to reduce the number of power supply voltages and enhance voltage swing, allowing SRAMs and SoCs to operate at low voltages with high speed and low power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional voltage boosting schemes are used to enable sub-0.5V operation, then operating voltage can be reduced, but power consumption increases and speed performance deteriorates
Solution Approach 1:
The patent changes the voltage swing parameter of the power supply from conventional fixed values to dynamically adjustable values. By varying the voltage swing of the power supply, the circuit can achieve both low power consumption and high speed operation at sub-0.5V voltages, resolving the trade-off between power and speed that plagues conventional voltage boosting schemes.
Solution Approach 2:
The patent introduces dynamic power supply voltage swing adjustment, making the power supply characteristics variable rather than fixed. This dynamic adaptation allows the circuit to optimize between power consumption and speed based on operating conditions, eliminating the static compromise required by conventional boosting approaches.
2Device complexity
If the number of power supply voltages is reduced to simplify the system, then device complexity decreases, but voltage swing and operating margin are compromised
Solution Approach 1:
The patent makes a single power supply perform multiple functions by enabling it to provide both the voltage level and the necessary voltage swing through dynamic adjustment. This multi-functional power supply approach eliminates the need for multiple separate power supply voltages while maintaining adequate operating margins, thus simplifying the system without compromising reliability.
Solution Approach 2:
By dynamically changing the voltage swing parameter of the single power supply, the system maintains sufficient voltage operating margin despite using fewer power supply voltages. This parameter adaptation allows the simplified power supply architecture to achieve the same functional outcomes as complex multi-voltage systems.
3Use of energy by moving object
If gate-source differentially-driven schemes are applied to reduce power consumption, then energy efficiency improves, but the scheme becomes ineffective at sub-0.5V voltages
Solution Approach 1:
The patent modifies the operating parameters of the gate-source differentially-driven scheme by combining it with dynamic power supply voltage swing adjustment. This parameter change enables the differentially-driven scheme to function effectively at sub-0.5V voltages where it previously failed, while maintaining its low power consumption advantages.
Data Source
AI summary
A memory includes a plurality of memory cells and a plurality of peripheral circuits. Each memory cell has a first inverter and a second inverter, the first inverter is supplied by a first power supply rail and a second power supply rail, and the second inverter is supplied by a third power supply rail and a fourth power supply rail. A first voltage difference is applied across the first power supply rail and the second power supply rail, a second voltage difference is applied across the third power supply rail and the fourth power supply rail, and the first voltage difference is less than the second voltage difference. The plurality of peripheral circuits use at least one of boosted power supplies corresponding to the second voltage difference and gate-source differentially-driven circuits.