CMOS Passivation Layer Poly Bump Prevention
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Solution Overview
Problem
The existing methods for fabricating complementary metal-oxide-semiconductor (CMOS) devices using the SiGe technique often result in the formation of 'poly bumps' due to improper removal of high-temperature oxide layers, which affects the reliability and performance of the devices.
Innovation Solution
A method involving the use of a carbon-containing oxynitride passivation layer with a low etching rate, formed through low-pressure chemical-vapor deposition, is employed to prevent the improper removal of the passivation layer during device manufacturing, and a thermal process is applied to densify the passivation layer, reducing the etching rate and avoiding the formation of poly bumps.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-temperature oxide layer is formed on the entire substrate and then selectively removed using a patterned photoresist layer as a mask, then the gate structure and spacer are protected by the remaining HTO layer, but the HTO layer is improperly removed during subsequent processes exposing the gate structure surface and substrate surface, leading to poly bump formation
Solution Approach 1:
The patent changes the material composition of the passivation layer from conventional high-temperature oxide to carbon-containing oxynitride, which fundamentally alters the etching rate parameter. This material substitution enables the passivation layer to resist removal during subsequent etching processes, preventing poly bump formation while maintaining protective functions.
Solution Approach 2:
The patent employs a composite passivation layer structure consisting of multiple layers with different materials and properties. The carbon-containing oxynitride layer is combined with other dielectric layers to create a multi-functional passivation structure that provides both protection and selective etching resistance, solving the contradiction between maintaining integrity and enabling necessary process steps.
2Manufacturing precision
If a thermal process is applied to densify the carbon-containing oxynitride passivation layer, then the etching rate is reduced preventing poly bump formation, but the process temperature and time must be precisely controlled to avoid damaging other device structures
Solution Approach 1:
The thermal densification process is performed as a preliminary step before the etching process that forms trenches. By pre-densifying the passivation layer, the subsequent etching process can proceed without risk of poly bump formation. This preliminary action simplifies overall process control by decoupling the densification and etching steps.
Solution Approach 2:
The patent replaces mechanical/chemical removal methods with a thermal field-based approach. Instead of using aggressive chemical etchants that could damage the passivation layer, a controlled thermal field is applied to modify the material properties of the passivation layer, reducing its etching rate through densification rather than chemical reaction.
3Reliability
If the passivation layer is formed conformally over the substrate including gate structures and spacers, then comprehensive protection is provided, but selective removal during trench formation becomes challenging without exposing critical structures
Solution Approach 1:
The patent applies local quality by creating a passivation layer with spatially varying properties. The carbon-containing oxynitride layer is formed conformally but exhibits different etching resistance at different locations due to its material composition. This enables selective removal at trench locations while maintaining protection at gate and spacer locations during the etching process.
Solution Approach 2:
The carbon-containing oxynitride passivation layer acts as an intermediary between the gate structure/spacer and the etching process. It provides a protective interface that can be selectively removed or resisted based on local conditions, mediating between the need for comprehensive protection and the need for easy trench formation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces the generation of poly bumps and enhances the reliability and performance of CMOS devices by maintaining the integrity of the passivation layer and improving subsequent process steps.
Implementation Method 1
a carbon-containing oxynitride passivation layer with a low etching rate, formed through low-pressure chemical-vapor deposition
Implementation Method 2
a thermal process is applied to densify the passivation layer, reducing the etching rate
Data Source
AI summary
A complementary metal-oxide-semiconductor (CMOS) device includes a substrate with a first active region and a second active region; a first gate structure and a second gate structure, respectively disposed on the first active region and the second active region; a first spacer structure and a second spacer structure respectively disposed on sidewalls of the first gate structure and the second gate structure; a first LDD and a second LDD respectively disposed in the substrate at both sides of the first gate structure and the second gate structure; an epitaxial material layer, disposed in the first active region and located on a side of the first LDD; and a passivation layer, disposed on the first gate structure, the first spacer structure, and the first LDD and covering the second active region, wherein the passivation layer comprises a carbon-containing oxynitride layer.