CMOS Pixel Isolation Layout for Photodiode Charge Leakage
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Solution Overview
Problem
Existing CMOS image sensors face challenges in effectively suppressing charge leakage from one photodiode to adjacent pixels, leading to image quality issues due to insufficient isolation structures.
Innovation Solution
The photoelectric conversion device incorporates a specific configuration with semiconductor regions of a first conductivity type, utilizing element isolation structures with varying widths and materials to create distinct potential barriers, ensuring that electrons generated in one region are more likely to discharge into a dedicated discharging region rather than leaking into the photoelectric conversion unit, thereby reducing false signals and improving image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If a charge discharging region is disposed between pixels to suppress blooming, then charge leakage from adjacent pixels is reduced, but charge leakage from other portions still occurs and cannot be sufficiently suppressed
Solution Approach 1:
The isolation structure is divided into a first element isolation structure between the photoelectric conversion unit and select transistor, and a second element isolation structure between the select transistor and charge discharging region. This segmentation allows different isolation regions to be optimized independently for their specific functions.
Solution Approach 2:
The first element isolation structure is designed with a shorter distance to create a stronger potential barrier for preventing charge leakage into the photodiode, while the second element isolation structure has a longer distance to facilitate charge discharge. Each isolation structure has locally optimized properties matching its specific function.
2Object-affected harmful factors
If element isolation structures are made wider to improve charge isolation, then charge leakage suppression is enhanced, but device area increases
Solution Approach 1:
The isolation structures are segmented into different regions with different width requirements. The first element isolation structure uses a narrower width sufficient for charge blocking, while the second uses a wider width for charge discharge, optimizing the total area usage.
Solution Approach 2:
Different widths are assigned to different isolation structures based on their local functional requirements. The first isolation structure has optimized narrow width for effective charge blocking with minimal area, while the second has wider width for discharge functionality.
3Object-affected harmful factors
If the distance between first semiconductor region and second semiconductor region is increased to reduce charge leakage, then charge isolation is improved, but the distance to charge discharging region increases reducing discharge efficiency
Solution Approach 1:
The spatial arrangement is segmented into two distinct isolation structures with different distance characteristics. The first isolation structure has short distance for efficient charge discharge, while the second has longer distance for effective charge blocking, resolving the conflicting requirements.
Solution Approach 2:
Different distance parameters are assigned to different isolation structures based on their local functional needs. The first isolation structure optimizes for discharge efficiency with shorter distance, while the second optimizes for charge blocking with longer distance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses charge leakage, enhancing image quality by maintaining the integrity of pixel signals and reducing false signals caused by electron migration, resulting in improved performance of CMOS image sensors.
Implementation Method 1
a potential barrier for the charge of the first polarity of the first element isolation structure between the first semiconductor region and the second semiconductor region is higher than a potential barrier for the charge of the first polarity of the second element isolation structure
Implementation Method 2
a shortest distance between the first semiconductor region and the second semiconductor region via the first element isolation structure is greater than a shortest distance between the second semiconductor region and the third semiconductor region via the second element isolation structure
Implementation Method 3
a photoelectric conversion unit includes a first semiconductor region of a first conductivity type for storing charge generated by photoelectric conversion
Data Source
AI summary
A photoelectric conversion device includes a pixel including an amplifier transistor generating a signal according to charge generated in a photoelectric conversion unit and a select transistor controlling an output of the signal, and an output line outputting the signal from the pixel. The photoelectric conversion unit includes a first semiconductor region for accumulating charge, the select transistor includes a second semiconductor region to which the output line is connected, and the pixel further includes a third semiconductor region being capable of discharging charge. The second semiconductor region is adjacent to the first semiconductor region via a first element isolation structure, and is adjacent to the third semiconductor region via a second element isolation structure. A shortest distance between the first and second semiconductor regions via the first element isolation structure is greater than a shortest distance between the second and third semiconductor regions via the second element isolation structure.


