CMOS Pixel Detector Parallel Sparse Readout Architecture
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Solution Overview
Problem
Current MAPS chips face limitations in readout speed and power consumption due to serial readout architectures and global readout interactions, which are not sufficient to meet the requirements of next-generation high-hit-rate particle physics experiments.
Innovation Solution
The proposed solution involves a high-speed CMOS pixel detector that utilizes a parallel sparse readout technology based on super pixels, a node-based distributed column readout architecture, and a clockless technology based on asynchronous circuits to improve readout rates and reduce power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If serial readout architecture is used, then device complexity is reduced, but readout speed deteriorates
Solution Approach 1:
The pixel array is divided into multiple independent super-pixels, each capable of autonomous detection and readout. This segmentation enables parallel processing of detection data from different regions, significantly increasing readout speed while maintaining manageable complexity through modular design
Solution Approach 2:
The readout architecture transitions from a single-dimensional serial readout to a multi-dimensional parallel readout structure. Multiple readout paths are established simultaneously, allowing data to be transmitted along multiple dimensions (different super-pixels reading out concurrently), thereby exponentially increasing readout throughput
2Use of energy by moving object
If global readout interaction is used, then device complexity is reduced, but power consumption deteriorates
Solution Approach 1:
The centralized global readout system is segmented into distributed local readout units associated with each super-pixel. Each unit independently processes and transmits data from its local region, eliminating the need for long-distance global data bus interactions and reducing overall power consumption
Solution Approach 2:
Each super-pixel is equipped with autonomous readout capabilities, allowing it to independently manage its own data transmission without relying on centralized control. This self-service approach minimizes communication overhead and power consumption associated with global coordination
3Measurement precision
If pixel size is reduced, then measurement precision is improved, but pixel occupancy increases
Solution Approach 1:
The detector is divided into multiple super-pixels that operate independently with sparse readout. This allows the use of smaller pixel sizes for improved position resolution while maintaining low effective occupancy through selective readout of only active super-pixels, rather than reading all pixels continuously
4Measurement precision
If integration time is increased, then measurement precision is improved, but readout time deteriorates
Solution Approach 1:
The pixel array is divided into multiple super-pixels that can be read out in parallel. This segmentation allows the system to maintain long integration times for improved detection accuracy while reducing frame readout time through simultaneous readout of multiple segments, effectively decoupling integration time from readout time
Data Source
AI summary
A high-speed CMOS pixel detector is provided, which includes a plurality of super pixel modules, where each super pixel module includes an array of N×M super pixel cells and a digital readout logic circuit connected to the N×M super pixel cells, and data is output between the super pixel modules via asynchronous control logic; and peripheral modules, including at least an EoC module, a peripheral readout module, and a peripheral data transmission module connected in sequence, where the EoC module is connected to the super pixel modules. This application adopts a structure in which a plurality of super pixel cells are integrated, allowing for upgrading of a serial sparse readout mode to a parallel sparse readout mode, thereby greatly improving a readout rate, enabling a plurality of pixels to share resources, and reducing pixel dimensions.