CMOS Image Sensor Pixel Structure for Deep Well Isolation Scaling

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Solution Overview

Problem

The existing process for forming CMOS image sensors limits the ability to scale down pixel dimensions due to poor overlay control in lithography processes, leading to challenges in deep well region scaling and trench width control, which restricts the development of extremely small pixel pitch sensors.

Innovation Solution

The proposed solution involves a semiconductor substrate with a doped well that partially extends into the substrate and a deep trench isolation structure within the footprint of the doped well, allowing for reduced pixel region dimensions while maintaining good electrical performance through blanket doping processes and optimized masking layers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If deep well regions and masking layers are used in traditional CMOS image sensors, then electrical isolation and manufacturing are achieved, but pixel dimensions and overall sensor size increase

Engineering Contradiction:
Improvepixel dimensionVSAvoiddeep well region structure
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

The patent transitions from planar pixel architecture to a three-dimensional stacked architecture, placing photodetectors, transfer gates, and readout circuits on different vertical layers. This dimensional change allows pixel dimensions to be reduced while maintaining all necessary functional components, directly resolving the contradiction between smaller pixel size and structural complexity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent implements nested functional elements within the pixel structure, including deep well regions containing photodetectors, with transfer gates and readout circuits integrated in overlapping or contained configurations. This nesting allows multiple functions to coexist in a compact volume, reducing overall pixel dimension while managing structural complexity.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Area of stationary object

If pixel size is reduced to achieve smaller sensor, then sensor size decreases, but electrical isolation performance deteriorates

Engineering Contradiction:
Improvesensor sizeVSAvoidelectrical isolation
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent divides the pixel array into independently isolated pixel units using deep trench isolation structures that extend through multiple layers. Each pixel is segmented with its own isolation boundaries, maintaining electrical isolation performance even as overall sensor size decreases and pixels are packed more densely.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces deep trench isolation structures filled with dielectric material as intermediary elements between adjacent pixels. These isolation trenches act as mediators that prevent electrical interference between neighboring pixels, maintaining isolation reliability while allowing reduced pixel pitch and smaller sensor size.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If deep trench isolation structure is implemented, then electrical isolation improves, but manufacturing complexity increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidmanufacturing process
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent forms deep trench isolation structures at early stages of the fabrication process, before subsequent layer deposition and device formation. By performing the isolation trench etching and filling operations preliminarily, the manufacturing process is simplified as later steps can proceed without needing to navigate complex existing structures.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The deep trench isolation structures serve multiple functions simultaneously: providing electrical isolation between pixels, defining pixel boundaries, and serving as mechanical support structures. This multi-functionality reduces the need for separate dedicated isolation structures, simplifying the overall manufacturing process while maintaining isolation reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables more scaled-down pixel dimensions while achieving performance metrics that meet or exceed those of traditional CMOS image sensors, with improved electrical isolation and full well capacity.

Implementation Method 1

The image sensor comprises a photodetector disposed in the pixel region and configured to absorb incident radiation and output electrical signals corresponding to the incident radiation

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS20230307479A1Image sensor having an improved structure for small pixel designs
Publication Date: 2023.09.28 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20230307479A1 patent drawing
  • US20230307479A1 patent drawing
  • US20230307479A1 patent drawing

AI summary

Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a substrate having a first side and a second side. The substrate includes a pixel region. A photodetector is in the pixel region. A first doped region is in the pixel region. A second doped region is in the pixel region. The second doped region is vertically between the first doped region and the first side of the substrate. A doped well is in the substrate and laterally surrounds the pixel region. The doped well is partially in the second doped region. A portion of the second doped region is vertically between the doped well and the second side of the substrate. A trench isolation structure is in the semiconductor substrate and laterally surrounds the pixel region. A footprint of the trench isolation structure is within a footprint of the doped well.