CMOS Pixel Layout Asymmetry for Stable Saturation Signal Charge
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Solution Overview
Problem
In CMOS image sensors, the linearly symmetrical and point-symmetrical arrangement of photodiodes and transfer gates between adjacent pixels leads to unintended modulation of saddle points, causing fluctuations in saturation signal charge, which deteriorates electrical characteristics and limits design flexibility for widening photodiodes and transfer gates towards the pixel boundary.
Innovation Solution
The imaging device arranges one or more of the photoelectric conversion units, floating diffusion, and transfer transistors non-linearly symmetrically and point-symmetrically between adjacent pixels, dispersing saddle points and allowing for easier design of structures near the pixel boundary, thereby improving layout efficiency and reducing signal charge fluctuations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If photodiodes and transfer gates are arranged linearly symmetrically and point-symmetrically between adjacent pixels, then layout regularity is improved, but saddle points become modulated causing fluctuations in saturation signal charge amount
Solution Approach 1:
The patent applies asymmetry by arranging photodiodes and transfer gates in a non-linearly symmetrical and point-symmetrical configuration between adjacent pixels. Specifically, the photodiode in one pixel is positioned at a different distance from the pixel boundary compared to the photodiode in the adjacent pixel, breaking the linear symmetry while maintaining point symmetry. This asymmetrical arrangement prevents the saddle points from being modulated during charge transfer, thereby stabilizing the saturation signal charge amount while still providing layout regularity through the maintained point symmetry.
2Productivity
If photodiodes are widened toward the pixel boundary to improve layout efficiency, then layout efficiency is improved, but design rule limitations on separation distance between photodiodes are exceeded
Solution Approach 1:
The patent resolves this contradiction by implementing asymmetrical positioning of photodiodes relative to pixel boundaries. The photodiode in one pixel can be widened closer to the pixel boundary while the photodiode in the adjacent pixel is positioned at a different distance, ensuring that the separation distance between photodiodes always meets design rule requirements. This asymmetrical arrangement allows maximum utilization of pixel area for photodiode widening without violating minimum separation constraints, thereby improving layout efficiency while maintaining manufacturing precision.
3Productivity
If transfer gates are widened toward the pixel boundary to improve layout efficiency, then layout efficiency is improved, but saddle point modulation increases causing electrical characteristic deterioration
Solution Approach 1:
The patent applies asymmetry in the arrangement of transfer gates and photodiodes to prevent saddle point modulation. By positioning the transfer gate and photodiode in one pixel at different distances from the pixel boundary compared to adjacent pixels, the electric field distribution during charge transfer is optimized. This asymmetrical configuration ensures that the saddle points remain stable and are not modulated by the transfer gate operation, thereby maintaining electrical characteristics while allowing transfer gates to be widened for improved layout efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration suppresses modulation of saddle points and fluctuations in saturation signal charge, enhancing electrical characteristics and layout efficiency by allowing wider design of photodiodes and transfer gates near the pixel boundary.
Implementation Method 1
a photoelectric conversion unit
Data Source
AI summary
An imaging device capable of suppressing deterioration in electrical characteristics and improving layout efficiency is provided. The imaging device includes a semiconductor layer and a plurality of pixels provided in the semiconductor layer. Each of the plurality of pixels includes a photoelectric conversion unit, a floating diffusion that converts a charge generated by the photoelectric conversion unit into a voltage signal, and a transfer transistor that transfers the charge generated in the photoelectric conversion unit to the floating diffusion. In one pixel and the other pixel that are adjacent to each other among the plurality of pixels, one or more of the photoelectric conversion unit, the floating diffusion, and the transfer transistor are arranged non-linearly symmetrically and point-symmetrically.


