CMOS Voltage and Current Reference Using Temperature-Compensated Gate Leakage

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Solution Overview

Problem

Conventional current reference generators and voltage reference generators face challenges in achieving ultra-low power consumption while maintaining stability and low temperature coefficients, particularly in sub-nW circuits used in wireless systems and biomedical devices, where they often consume excessive power and have high temperature sensitivity.

Innovation Solution

The proposed solution involves an ultra-low-power voltage reference generator using a regular MOS transistor as a reference current source and a resistor, and a self-biased amplifier with a temperature-compensated gate-leakage array to generate a stable current reference, utilizing standard-VT and low-VT PMOS transistors with opposing temperature coefficients, and a two-stage push-pull structure for voltage regulation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional current reference generators are used, then stable current reference is achieved, but power consumption is high (μW to nW level)

Engineering Contradiction:

Improvecurrent reference stabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the operating parameters by using gate leakage current (typically a parasitic effect) as the primary current source instead of conventional biasing schemes. By operating transistors in specific regions and utilizing temperature-compensated gate leakage, the circuit achieves stable current reference at sub-nW power consumption levels, resolving the contradiction between stability and power consumption.

Inventive Principle:

Principle #35Parameter changes

Solution Approach 2:

The patent converts the harmful gate leakage current, which is typically considered a parasitic effect to be minimized, into a useful current source. By deliberately exploiting and compensating for gate leakage through temperature-matched transistor pairs, the circuit transforms this harmful effect into a beneficial feature that enables ultra-low power operation while maintaining reference stability.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

2Stability of the object's composition

If temperature compensation techniques are applied, then temperature coefficient is reduced, but circuit complexity increases

Engineering Contradiction:

Improvetemperature coefficientVSAvoidcircuit complexity

Core Design Contradiction:

Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent employs asymmetric transistor pairing where one transistor is designed to track temperature variations while the other provides a reference. The gate leakage currents of transistors with different threshold voltages are combined in a specific asymmetric configuration that naturally compensates for temperature effects, achieving low temperature coefficient without requiring complex compensation circuits.

Inventive Principle:

Principle #4Asymmetry

Solution Approach 2:

The circuit achieves temperature compensation through self-service mechanisms where the gate leakage currents of temperature-matched transistor pairs automatically compensate for each other's temperature drift. The inherent physical properties of the transistors and their biasing arrangement provide automatic temperature stabilization without external control or complex additional circuitry.

Inventive Principle:

Principle #25Self-service

3Use of energy by moving object

If leakage compensation is used, then power consumption is reduced to nW level, but temperature coefficient increases to 100 ppm/°C

Engineering Contradiction:

Improvepower consumptionVSAvoidtemperature coefficient

Core Design Contradiction:

Use of energy by moving objectVSStability of the object's composition

Solution Approach 1:

The patent creates a composite current reference by combining gate leakage currents from multiple transistor pairs with different characteristics. By synthesizing currents from transistors with complementary temperature dependencies and threshold voltage differences, the circuit achieves both ultra-low power consumption and low temperature coefficient, effectively creating a composite reference that overcomes the limitations of individual approaches.

Inventive Principle:

Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach achieves pW-level power consumption with minimal temperature sensitivity, enabling stable current generation at pA levels, and reduces line sensitivity, making it suitable for sub-nW applications with improved power and temperature stability.

Implementation Method 1

A self-biased amplifier biases an array of temperature compensated gate leakage transistors to provide a sufficiently large resistance to generate an ultra-low current from the reference voltage

Methodology Applied

Scientific EffectGate leakage:

Data Source

PatentUS11334105B2Stabilized voltage and current reference generator and circuits

Publication Date: 2022.05.17 RGT UNIV OF CALIFORNIA

AI summary

An ultra-low-power voltage reference generator in an integrated CMOS circuit includes a regular MOS transistor reference current source connected to a line voltage and a regular MOS transistor resistor between the regular MOS transistor reference current source and ground. A constant with temperature reference voltage VREF is generated from a terminal inter-connecting the regular MOS transistor reference current source and the regular MOS transistor resistor. An ultra-low-power current reference generator receives a reference voltage and generated ultra-low level current from the reference voltage with a temperature compensated gate-leakage array.