CMOS RF Switch Body Biasing for Parasitic Capacitance Reduction

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Solution Overview

Problem

The insertion loss and isolation of semiconductor T/R switches in wireless communication devices are compromised due to parasitic capacitance, which affects the reliability and efficiency of RF signal processing.

Innovation Solution

The implementation of a CMOS switch design where the body of the transistor is coupled to a bias voltage through a switch, effectively reducing the impact of parasitic capacitance and improving insertion loss and isolation by using bias voltages to control the transistor's operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a semiconductor T/R switch is implemented using CMOS transistors, then the device can achieve wireless communication functionality, but parasitic capacitance causes power leakage and degrades insertion loss and isolation

Engineering Contradiction:
Improveinsertion loss and isolationVSAvoidparasitic capacitance power leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts and removes the harmful parasitic capacitance effect by introducing a body biasing mechanism that separates the body terminal from the substrate, effectively taking out the parasitic capacitance path and preventing power leakage through the transistor body

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the electrical parameters of the transistor by applying body bias voltages to modify the threshold voltage and control the parasitic capacitance, thereby improving insertion loss and isolation characteristics dynamically

Inventive Principle:
Principle #35Parameter changes

2Device complexity

If the transistor body is directly connected to substrate, then the structure is simple, but RF signal power leaks through parasitic capacitance reducing circuit performance

Engineering Contradiction:
Improvetransistor structureVSAvoidRF signal power leakage
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent introduces an intermediary body biasing network between the transistor body and substrate, which acts as a mediator to control and minimize parasitic capacitance effects without requiring complete structural redesign, thus balancing complexity and performance

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If body bias voltage is applied to control parasitic capacitance, then insertion loss and isolation improve, but additional circuit components and control complexity are introduced

Engineering Contradiction:
Improveinsertion loss and isolationVSAvoidbiasing circuit
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent designs the body biasing circuit to serve multiple functions simultaneously: it controls parasitic capacitance, provides threshold voltage adjustment, and enables dynamic switching optimization, thereby reducing the need for separate circuits and minimizing overall complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11329647B2Radio frequency switch circuit
Publication Date: 2022.05.10 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11329647B2 patent drawing
  • US11329647B2 patent drawing
  • US11329647B2 patent drawing

AI summary

In a communication system, a communication terminal device transmits and receives RF signals frequently. Subsequent to an antenna of the communication terminal device, the communication terminal device includes a radio frequency switch (also referred to as transmit/receive (T/R) switch) that switches between two states at a high frequency, where one state is for receiving RF signal and other state for transmitting RF signal. In the exemplary embodiments of the disclosure, a complementary metal-oxide-semiconductor (CMOS) switch is provided, where the CMOS switch is deigned to have a high reliability by coupling a body of a transistor of the CMOS switch to a bias voltage through a switch, where the insertion loss and isolation are improved for the operation of the CMOS switch.