CMOS Image Sensor ADC Gating for Low-Noise, Low-Power Readout

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Solution Overview

Problem

Current imaging devices, particularly CMOS image sensors, face challenges in efficiently converting analog pixel output signals to digital signals due to high power consumption and noise filtering limitations in their analog-to-digital converter circuits.

Innovation Solution

The implementation of an analog-to-digital converter circuit with a comparator and counter system that uses a ramp signal for conversion, coupled with a control circuit for enabling and disabling components to reduce power consumption and noise, and an optional pixel bias circuit and amplify circuit for improved signal processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If traditional analog-to-digital converter circuits are used in CMOS image sensors, then conversion of analog pixel output signals to digital signals can be achieved, but power consumption is high and noise filtering is limited

Engineering Contradiction:
Improvesignal conversion accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action through the ramp signal generation and counter reset mechanism. The analog-to-digital conversion occurs in periodic cycles where a ramp signal is generated, compared against the pixel signal, and the counter is reset periodically. This periodic operation allows the converter to remain in a low-power state between conversions while maintaining accurate signal conversion capability when needed.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies dynamics by making the converter circuit dynamically switch between active and inactive states through the enable signal controlled by the control circuit. The ramp signal generator and counter are dynamically activated only during conversion periods, allowing the system to adapt its power consumption to the actual conversion needs rather than operating continuously at full power.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If traditional analog-to-digital converter circuits are used in CMOS image sensors, then conversion of analog pixel output signals to digital signals can be achieved, but noise filtering capability is limited

Engineering Contradiction:
Improvesignal conversion accuracyVSAvoidnoise
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an intermediary approach by using a ramp signal as a reference that mediates the comparison between the pixel signal and the digital output. The ramp signal acts as a controlled intermediary that allows the comparator to accurately determine the digital value while the control circuit serves as another intermediary that coordinates the timing and enables noise filtering through synchronized operation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent implements feedback through the control circuit that monitors the conversion process and generates enable signals to coordinate the ramp signal generator, comparator, and counter. This feedback mechanism ensures that conversion operations are synchronized and properly timed, which helps filter out noise by ensuring that conversions occur at optimal moments in the signal cycle.

Inventive Principle:
Principle #23Feedback

3Productivity

If converter components are continuously active to maintain signal conversion capability, then conversion readiness is improved, but power consumption increases

Engineering Contradiction:
Improveconversion readinessVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent resolves this contradiction by implementing periodic action where the converter components are activated in regular cycles rather than continuously. The control circuit generates enable signals that activate the ramp signal generator and counter only during required conversion periods, maintaining productivity by ensuring readiness when needed while reducing power consumption by keeping components in a low-power state between conversions.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent applies dynamics by making the converter circuit dynamically switch between active and inactive states. The control circuit dynamically controls the enable signals to activate components only when conversion is required, allowing the system to maintain conversion readiness capability while adapting power consumption to actual operational needs rather than operating continuously.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances the conversion efficiency of analog pixel output signals to digital signals while reducing power consumption and noise, thereby improving the overall performance of imaging devices.

Implementation Method 1

Each photosensitive element produces charge that is proportional to intensity of light which the photosensitive element receives

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS20240371894A1Imaging device
Publication Date: 2024.11.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20240371894A1 patent drawing
  • US20240371894A1 patent drawing
  • US20240371894A1 patent drawing

AI summary

An integrated circuit includes a first circuit, a comparator, a counter and a control circuit. The first circuit is configured to generate a ramp reference signal. The comparator is configured generate a comparator output signal in response to comparing a pixel output signal and the ramp reference signal. The counter is coupled to the comparator, and configured to be turned on or turned off in response to the comparator output signal. The control circuit is coupled to the comparator, and configured to generate a first enable signal in response to at least a control signal, and to turn on or turn off the comparator by the first enable signal.