CMOS Image Sensor Package Layout Without Through-Silicon Vias
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Solution Overview
Problem
The manufacturing process of semiconductor devices with CMOS image sensors is complex and costly, and the inclusion of through silicon vias (TSVs) increases the size of the semiconductor device, posing challenges in reducing manufacturing costs and minimizing chip size.
Innovation Solution
A semiconductor package design featuring a transparent plate with a first redistribution layer, conductive structures, and a CMOS image sensor chip with conductive members, where the image sensor chip is disposed on the redistribution layer with the lens facing an opening, and a sealing member covers the chip and conductive structures, eliminating the need for TSVs by using adhesive and sealing members to connect the redistribution layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through silicon vias (TSVs) are used to connect redistribution layers, then electrical connectivity is achieved, but the size of the semiconductor device increases and manufacturing complexity increases
Solution Approach 1:
The patent transitions from vertical through-silicon via connections to a combination of planar adhesive connections and vertical conductive structure connections. The adhesive member provides planar electrical connectivity at the interface between substrate and first redistribution layer, while conductive structures provide vertical connectivity through the sealing member, eliminating the need for deep TSVs through the substrate thickness.
Solution Approach 2:
The electrical connection path is segmented into multiple independent components: adhesive members for substrate-to-redistribution-layer connections, conductive structures for vertical connections through the sealing member, and redistribution wirings for lateral connections. This segmentation allows each component to be optimized independently and eliminates the need for single deep TSV paths.
2Reliability
If through silicon vias (TSVs) are formed, then electrical connectivity is achieved, but manufacturing cost increases and process complexity increases
Solution Approach 1:
The patent extracts the TSV formation process from the manufacturing sequence by using adhesive members that are applied and cured in place, rather than requiring mechanical drilling, plating, and filling of through-silicon holes. The adhesive members are integrated with the substrate surface, eliminating the need for separate TSV fabrication steps.
Solution Approach 2:
The adhesive member serves as an intermediary that provides both mechanical bonding and electrical connectivity between the substrate and first redistribution layer. This intermediary approach replaces the need for direct metallic TSV connections, simplifying the manufacturing process while maintaining electrical functionality.
3Reliability
If adhesive members surround conductive members, then electrical connectivity is achieved, but the space between lens and opening must be sealed
Solution Approach 1:
The adhesive member performs multiple functions simultaneously: it provides mechanical adhesion between substrate and first redistribution layer, establishes electrical connectivity through conductive pathways, and seals the peripheral region to prevent contamination. This multi-functionality eliminates the need for separate sealing components.
Solution Approach 2:
The patent merges the sealing function with the adhesive member by having the adhesive extend along and surround the peripheral region. This combines the bonding/adhesion function with the sealing function into a single integrated component, reducing overall device complexity while achieving both objectives.
Data Source
AI summary
A method of manufacturing a semiconductor package includes forming a first redistribution layer having an opening on a transparent plate, the first redistribution layer including first redistribution wirings; forming a plurality of conductive structures that extend in a vertical direction on the first redistribution layer and are electrically connected to the first redistribution wirings; providing an image sensor chip comprising a lens, and providing a plurality of conductive members; disposing the image sensor chip on the first redistribution layer such that the lens faces the opening and the conductive members are electrically connected to the first redistribution wirings; forming an adhesive member that extends along the peripheral region and surrounds the conductive members; forming a sealing member on the first redistribution layer to cover the image sensor chip, the conductive structures, and the adhesive member; and forming a second redistribution layer.