CMOS Switch Topology to Prevent NBTI Damage in PMOS Pairs
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Solution Overview
Problem
Transistors in integrated circuits, particularly in CMOS circuits, are susceptible to Negative Bias Temperature Instability (NBTI) damage due to threshold voltage degradation, leading to duty cycle distortion and reliability issues as they become smaller.
Innovation Solution
Incorporating a switch configuration with p-type and n-type transistors that can be selectively enabled to apply a supply voltage to output nodes, decoupling from ground potential, thereby preventing NBTI damage by using weaker p-type transistors to shunt cross-coupled p-type transistors and applying a control signal to place them in a nonconductive state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistors are made smaller to increase integration density, then productivity and circuit functionality are improved, but reliability deteriorates due to increased susceptibility to NBTI damage and threshold voltage degradation
Solution Approach 1:
The patent applies preliminary anti-action by proactively preventing NBTI damage before it occurs. During inactive modes, the control signal activates the first n-type transistor to decouple the switch from ground potential and activates the first p-type transistor to apply supply voltage to output nodes, thereby preemptively counteracting the conditions that would cause threshold voltage degradation and transistor damage during normal operation
Solution Approach 2:
The patent implements beforehand cushioning by creating a protective mechanism that cushions transistors against NBTI damage. The switch configuration with control signals acts as a cushioning layer that absorbs and mitigates the harmful effects of negative bias and temperature instability before they can degrade the transistor threshold voltages, ensuring reliable operation even as transistors are scaled down
2Use of energy by moving object
If transistors operate in inactive mode for extended periods, then energy consumption is reduced, but NBTI damage accumulates causing threshold voltage degradation and duty cycle distortion
Solution Approach 1:
The patent applies periodic action by implementing time-multiplexed operation where the switch alternates between active and inactive modes with periodic application of control signals. During inactive mode, the control signal is periodically applied to maintain transistor health by decoupling from ground and applying supply voltage, allowing energy savings during normal operation while preventing cumulative NBTI damage through periodic protective action
Solution Approach 2:
The patent utilizes parameter changes by dynamically adjusting the electrical parameters of the switch based on operational mode. The control signal modifies the voltage parameters at the output nodes during inactive mode, changing the bias conditions to prevent NBTI damage while maintaining low power consumption, thereby adapting transistor operating parameters to balance energy efficiency and reliability
Data Source
AI summary
Preventing transistor damage to an integrated circuit is described. The circuit includes a switch with a first pair of p-type transistors respectively coupled in source-drain parallel with second pair of p-type transistors for preventing Negative Bias Temperature Instability (“NBTI”) damage to the second pair of p-type transistors. The switch is configured to such that when in a state associated with causing, or potentially causing, NBTI damage, both of the second pair of p-type transistors are in an OFF state for preventing NBTI damage thereto.