CMOS Synaptic Array Weight Update via Charge Sharing
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Solution Overview
Problem
Conventional synaptic arrays experience variations in weight update characteristics due to cell location, leading to different pulse shapes at the near-end and far-end, which affects the efficiency and consistency of weight updates across the array.
Innovation Solution
A neuromorphic circuit with a CMOS synaptic array cell using a charge sharing technique to control the gate voltage of CMOS transistors, allowing for non-overlapping pulses on cell control lines aligned with row and column lines to update weights uniformly across the array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional synaptic arrays are used, then weight updates can be performed, but weight update characteristics vary due to cell location (near-end vs far-end)
Solution Approach 1:
The patent applies local quality by introducing location-specific compensation mechanisms. Different cells in the array receive tailored control signals based on their position (near-end vs far-end), ensuring that each cell's weight update characteristics are optimized for its specific location, thereby achieving uniformity across the entire array.
Solution Approach 2:
The patent changes operational parameters (such as pulse width, amplitude, or timing) dynamically based on cell location. By adjusting these parameters for different regions of the array, the system compensates for location-dependent variations and achieves consistent weight update characteristics across all cells.
2Manufacturing precision
If global bias circuitry is used to maintain consistency, then weight update characteristics can be uniform, but device complexity increases
Solution Approach 1:
The patent extracts and removes the global bias circuitry from the system. Instead of using a centralized bias generation mechanism, the invention implements distributed control where each cell or row/column independently generates its control signals, eliminating the need for complex global bias circuitry while maintaining consistency.
Solution Approach 2:
The patent enables self-service by allowing each synaptic cell or group of cells to autonomously generate its own control signals and maintain its weight update characteristics without relying on external global bias circuitry. This decentralized approach reduces overall device complexity while achieving uniform performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach maintains consistent weight update characteristics across the array while increasing operation speed and eliminating the need for global bias circuitry, allowing for faster and more efficient synaptic weight updates without location dependence.
Implementation Method 1
a Complimentary Metal-Oxide-Semiconductor (CMOS) transistor having an on-resistance controlled by a gate voltage of the CMOS transistor to update a weight of the crossbar synaptic array cell
Implementation Method 2
The gate voltage of the CMOS transistor is controlled by performing a charge sharing technique that updates the weight of the crossbar synaptic array cell using non-overlapping pulses on cell control lines
Data Source
AI summary
A neuromorphic circuit, chip, and method are provided. The neuromorphic circuit includes a crossbar synaptic array cell. The crossbar synaptic array cell includes a Complimentary Metal-Oxide-Semiconductor (CMOS) transistor having an on-resistance controlled by a gate voltage of the CMOS transistor to update a weight of the crossbar synaptic array cell. The gate voltage of the CMOS transistor is controlled by performing a charge sharing technique that updates the weight of the crossbar synaptic array cell using non-overlapping pulses on control lines that are aligned with a set of row lines and a set of column lines.