CMP Polishing Pad Structure for Thermal Expansion Mismatch
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Solution Overview
Problem
Existing polishing pads do not effectively manage the differences in thermal expansion coefficients between materials in semiconductor devices, leading to issues like dishing, bonding failures, and connectivity problems during the CMP process.
Innovation Solution
A polishing pad with a dishing value of 0.5 nm to 3.5 nm, adjusted for materials with different thermal expansion coefficients, is used to control the polishing rate and prevent defects by ensuring appropriate bonding and connectivity between semiconductor substrates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a conventional polishing pad is used for CMP process, then the polishing rate can be maintained, but dishing occurs on the surface of film substances with different thermal expansion coefficients
Solution Approach 1:
The polishing pad employs a multi-layer structure where each layer has different physical properties (hardness, porosity, elasticity) to selectively control polishing rates for different materials. The first layer targets metal films with high thermal expansion coefficients, the second layer targets dielectric films with low thermal expansion coefficients, enabling localized quality control across different regions of the wafer surface.
Solution Approach 2:
The polishing pad is constructed as a composite of multiple layers with distinct characteristics: a first polishing layer with specific hardness and porosity for metal films, and a second polishing layer with different properties for dielectric films. This composite structure allows the pad to simultaneously address the different polishing requirements of materials with varying thermal expansion coefficients, preventing dishing while maintaining overall polishing efficiency.
2Reliability
If polishing is performed on materials with different thermal expansion coefficients, then connectivity between layers can be improved, but bonding failures occur due to thermal expansion differences
Solution Approach 1:
The polishing pad applies different polishing pressures and rates to different regions of the wafer surface corresponding to metal and dielectric films. By controlling the polishing rate for each material type separately, the pad ensures that metal and dielectric films are polished to matching heights, creating proper bonding surfaces that accommodate thermal expansion differences during subsequent bonding processes.
Solution Approach 2:
The polishing process performed before bonding预先 (in advance) compensates for the thermal expansion mismatch that will occur during bonding. By controlling the polishing rates to create appropriate height differences between metal and dielectric films prior to bonding, the structure is pre-adjusted to accommodate thermal expansion, preventing bonding failures and improving reliability.
3Productivity
If the polishing rate is increased to improve productivity, then defects such as dishing and bonding failures increase
Solution Approach 1:
The polishing pad divides the polishing function into separate layers, each optimized for specific materials. The first layer handles metal film polishing at one rate, while the second layer handles dielectric film polishing at a different rate. This segmentation allows high productivity through rapid polishing while maintaining surface uniformity by controlling the relative polishing rates of different materials, preventing defects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The polishing pad enhances the surface processing quality and bonding stability of semiconductor devices by controlling dishing and preventing defects, improving the adhesion and connectivity between layers with varying thermal expansion coefficients.
Implementation Method 1
a chemical mechanical planarization (CMP) process may be used to planarize the surfaces of materials and substrates
Implementation Method 2
The pores in a polishing pad may be formed by using a solid phase foaming agent, a gas phase foaming agent, or a liquid phase foaming agent, or by generating a gas by a chemical reaction
Implementation Method 3
A technical problem to be solved by the present invention is to provide a polishing pad having specific polishing properties for a film substance to be polished that comprises different materials having different coefficients of thermal expansion, thereby being capable of generating a predetermined dishing on the surface of the film substance to be polished
Data Source
AI summary
According to embodiments of the present invention, there are provided a polishing pad and a process for preparing a semiconductor device using the polishing pad. The polishing pad comprises a polishing layer having a polishing selectivity within a predetermined range depending on the coefficient of thermal expansion of an object to be polished. The dishing of the semiconductor substrate is controlled during the polishing process, whereby surface defects and bonding failures of semiconductor devices can be reduced.