CMUT Isolation Posts for Charge Trapping Reliability
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Solution Overview
Problem
Capacitive Micromachined Ultrasonic Transducers (CMUTs) face reliability issues due to charge trapping, leading to dielectric breakdown and performance degradation, particularly when used on heavily-doped substrates, which existing solutions often compromise acoustic performance or manufacturing complexity.
Innovation Solution
A wafer-bonding process that includes partially burying isolation posts within the CMUT structure, growing an optimal oxide layer on a heavily-doped substrate, and reducing parasitic capacitance through a dedicated manufacturing strategy, utilizing SOI wafers to minimize charge trapping while maintaining acoustic performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If isolation posts are used to reduce charge trapping, then reliability is improved, but device capacitance decreases and manufacturing complexity increases
Solution Approach 1:
The patent extracts the charge trapping problem by removing the traditional insulation layer entirely and replacing it with isolation posts positioned at specific locations within the cavity. This extraction approach eliminates the harmful charging mechanism while maintaining the necessary electrical isolation, thereby improving reliability without requiring complex multi-layer insulation structures.
Solution Approach 2:
The patent segments the insulation function by distributing multiple isolation posts throughout the cavity rather than using a continuous insulation layer. Each post handles local charge isolation needs, and their collective arrangement provides overall charge trapping mitigation. This segmentation allows the system to achieve reliability improvement while maintaining manageable device complexity.
2Reliability
If isolation posts are used to reduce charge trapping, then reliability is improved, but acoustic performance deteriorates
Solution Approach 1:
The patent applies local quality by positioning isolation posts only at specific locations where charge trapping is most problematic, rather than using a continuous insulation layer that would affect the entire acoustic path. The posts are strategically placed to address local charging issues while leaving the majority of the acoustic transmission path clear, thus maintaining acoustic performance while improving reliability.
3Reliability
If a continuous insulation layer is used, then charge trapping is reduced, but manufacturing complexity increases and acoustic performance decreases
Solution Approach 1:
The patent extracts the insulation function from a continuous layer format and implements it through discrete isolation posts. This extraction simplifies the manufacturing process by eliminating the need for precise continuous layer deposition and patterning, while still achieving the essential charge trapping reduction through strategically positioned posts.
4Reliability
If the insulation layer is removed completely, then charge trapping is eliminated, but dielectric breakdown risk increases
Solution Approach 1:
The patent introduces isolation posts as intermediary elements that provide localized dielectric isolation where needed to prevent dielectric breakdown, while leaving the rest of the space free of insulation materials. These posts act as mediators that provide just enough insulation to prevent breakdown without creating the continuous charging paths associated with full insulation layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces charge trapping, preserves acoustic performance, and decreases parasitic capacitance, enhancing the reliability and sensitivity of CMUTs, especially when fabricated on heavily-doped substrates.
Implementation Method 1
a dedicated manufacturing strategy to grow an optimal oxide layer on a heavily-doped substrate
Implementation Method 2
A wafer-bonding process that includes partially burying isolation posts within the CMUT structure
Data Source
AI summary
A capacitive micromachined ultrasonic transducer including a lower electrode, an upper electrode, and a membrane attached to the upper electrode and positioned between the lower electrode and the upper electrode. Anchors are connect to the membrane and the lower electrode such that a cavity is defined between the lower electrode and the membrane. One or more posts are positioned within the cavity, the posts partially buried within the membrane and extending towards the lower electrode. A method of producing a capacitive micromachined ultrasonic transducer includes forming an oxide growth layer on a device layer of undoped silicon and removing portions of the oxide growth layer to form anchors extending beyond the outer surface of the device layer and posts partially buried within post holes in the device layer and extending beyond the outer surface of the device layer.