Carbon Nanotube Transistor P-N Junction Contacts
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Carbon nanotube transistors suffer from high OFF current due to Schottky barrier contacts, which limits their ON/OFF ratio, especially at larger drain-source voltages, hindering their performance in flexible electronics and displays.
Innovation Solution
A carbon nanotube transistor is fabricated with a p-n junction formed by doping the carbon nanotubes in the gate and spacer regions using different dielectric materials, such as AlON/HfO2 and AlON/Al2O3, to reduce leakage current and enhance the ON/OFF ratio.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If carbon nanotube thin-film transistors are fabricated with standard Schottky barrier contacts, then device mobility is improved and fabrication cost is reduced, but OFF current increases and ON/OFF ratio deteriorates
Solution Approach 1:
The patent applies local quality by creating different doping regions (n-type and p-type) at specific locations along the carbon nanotube channel. The carbon nanotube is doped to form a p-n junction with an n-type region under the gate electrode and p-type regions in the source and drain contact regions. This localized doping strategy allows the channel to exhibit high mobility where needed while forming Schottky barrier-free contacts at the interfaces, thereby resolving the contradiction between mobility and ON/OFF ratio.
Solution Approach 2:
The patent utilizes parameter changes by modifying the electrical properties of the carbon nanotube through controlled doping. By adjusting the doping type and concentration in different regions, the patent transforms the contact characteristics from Schottky barrier (high resistance) to ohmic contact (low resistance) at the source and drain, while maintaining appropriate barrier height under the gate for carrier control. This parameter modification enables simultaneous achievement of high mobility and low OFF current.
2Power
If larger voltage is applied between source and drain, then device performance is enhanced, but OFF current increases due to thermionic emission over Schottky barrier
Solution Approach 1:
The patent eliminates Schottky barrier formation at the source and drain contact regions by implementing p-type doping in these areas, creating ohmic contacts. This localized modification ensures that when larger voltages are applied, carriers can enter and exit the channel without encountering Schottky barriers, preventing thermionic emission-induced OFF current while still allowing high current flow during ON state for enhanced device performance.
3Reliability
If p-n junction is formed by doping carbon nanotubes in gate and spacer regions, then ON/OFF ratio is improved and leakage current is reduced, but device complexity increases
Solution Approach 1:
The patent merges the doping process with the existing transistor fabrication steps. The p-n junction formation is integrated into the standard CMOS-compatible fabrication sequence, where doping is performed during or alongside the deposition of gate and contact electrodes. By combining the junction formation with existing process steps rather than adding separate dedicated doping steps, the patent achieves complex p-n junction structures without proportionally increasing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The p-n junction significantly increases the ON/OFF ratio of the carbon nanotube transistor, improving its performance by reducing high leakage currents and enhancing device stability.
Implementation Method 1
the carbon nanotube is doped at the gate electrode and in the space region to form a p-n junction
Implementation Method 2
transistors with this material potentially suffer from larger OFF current due to Schottky barrier contacts. The ambipolar current from the thermionic emission over the Schottky barrier height greatly limits device ON/OFF ratio
Implementation Method 3
a gate structure including a gate electrode deposited on the carbon nanotube
Data Source
AI summary
A carbon nanotube transistor and method of manufacturing a carbon nanotube transistor is disclosed. The carbon nanotube transistor includes a carbon nanotube on a substrate, a gate electrode deposited on the carbon nanotube, and at least one of a source electrode and a drain electrode deposited on the carbon nanotube and separated from the gate electrode by a space region. The carbon nanotube is doped at the gate electrode an in the space region to form a p-n junction.