Coarse and Fine Programming in Solid State Memory
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Solution Overview
Problem
Traditional solid-state memory devices face inefficiencies in programming and reading operations due to their binary nature, which becomes increasingly troublesome as more bits are stored on each multi-level cell, leading to longer operation times and susceptibility to program disturb and floating gate-to-floating gate coupling.
Innovation Solution
The memory devices utilize analog voltage signals to represent threshold voltage ranges across a continuum, allowing for single read or write operations that capture complete bit patterns, rather than discrete bits, and employ coarse and fine programming pulses to mitigate program disturb and coupling effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional binary programming methods are used in multi-level cells, then programming operations become increasingly complex and time-consuming as more bits are stored per cell, but switching to analog voltage signals promises faster operations
Solution Approach 1:
The patent replaces traditional binary digital signaling with analog voltage signals to represent multiple bits simultaneously. Instead of using separate binary operations for each bit, the system applies analog voltage levels that directly encode multi-bit data, eliminating the need for multiple sequential binary programming operations and significantly reducing programming complexity and time
Solution Approach 2:
The invention changes the fundamental parameter representation from discrete binary values to continuous analog voltage levels. By mapping analog voltage ranges to specific threshold voltage states in the memory cells, the system can program multiple bits in a single operation rather than requiring multiple binary programming steps, thereby improving productivity
2Speed
If large programming pulses are used to program memory cells, then programming speed improves, but program disturb and floating gate-to-floating gate coupling effects increase
Solution Approach 1:
The patent segments the programming process into two distinct phases: coarse programming using larger pulses to establish the primary threshold voltage state, and fine programming using smaller pulses to precisely adjust the threshold voltage to the target value. This segmentation allows the system to achieve both fast programming and minimal program disturb by using appropriate pulse sizes for each programming stage
Solution Approach 2:
The invention applies partial action by using just enough programming pulse strength to achieve the desired threshold voltage change. Rather than consistently applying excessive large pulses, the system uses coarse pulses when needed followed by fine-tuning pulses, thereby achieving programming speed without continuously inducing program disturb or coupling effects
3Loss of information
If multiple read operations are performed to retrieve complete bit patterns, then data accuracy improves, but operation time increases
Solution Approach 1:
The patent merges multiple binary read operations into a single analog read operation. By reading the analog voltage level of the memory cell, the system simultaneously retrieves all bits encoded in that voltage state, eliminating the need for multiple sequential read operations and reducing both operation time and potential read disturb effects
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces operation times and minimizes the impact on neighboring cells, improving programming speed and reducing errors by allowing a single read operation to return multiple bits of information and using smaller programming pulses to fine-tune threshold voltages.
Implementation Method 1
Changes in threshold voltage of the cells, through programming of charge storage or trapping layers or other physical phenomena, determine the data value of each cell
Data Source
AI summary
Memory devices adapted to receive and transmit analog data signals representative of bit patterns of two or more bits facilitate increases in data transfer rates relative to devices communicating data signals indicative of individual bits. Programming of such memory devices includes initially programming a cell with a coarse programming pulse to move its threshold voltage in a large step close to the programmed state. The neighboring cells are then programmed using coarse programming. The algorithm then returns to the initially programmed cells that are then programmed with one or more fine pulses that slowly move the threshold voltage in smaller steps to the final programmed state threshold voltage.


