Coaxial MRAM Top Electrode Geometry to Prevent ILD Voids
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In the fabrication of magneto-resistive random access memory (MRAM) devices, voids can form between pillars due to inter-level dielectric (ILD) deposition, leading to shorts between MRAM pillars as the ILD grows together and blocks further filling, causing electrical signals to short between adjacent cells.
Innovation Solution
The use of a coaxial top electrode with a diameter smaller than the pillar diameter increases the distance between MRAM pillars, preventing the ILD from forming a barrier between them, thus reducing the likelihood of voids and subsequent shorts by ensuring uniform ILD deposition.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a standard diameter top electrode is used matching the pillar diameter, then the MRAM cell structure is simple and manufacturing is easier, but voids form in the interlayer dielectric between pillars causing shorts
Solution Approach 1:
The top electrode is designed with non-uniform diameter along its length, featuring a reduced diameter section in the middle portion compared to the bottom and top portions. This local variation in geometry prevents ILD void formation in the gaps between adjacent pillars while maintaining electrical functionality, resolving the contradiction between reliability and structural simplicity.
Solution Approach 2:
The electrode diameter parameter is changed along its length rather than remaining constant. By reducing the diameter of the middle portion, the electrode creates adequate spacing that allows complete ILD deposition without void formation, thereby preventing shorts while maintaining a relatively simple overall structure.
2Manufacturing precision
If the top electrode diameter is reduced to prevent voids, then ILD deposition becomes uniform and shorts are prevented, but the electrode structure becomes more complex
Solution Approach 1:
The electrode exhibits local quality variation with different diameters in different sections. The middle portion has a reduced diameter specifically tailored to ensure uniform ILD deposition in the gap region, while the end portions maintain larger diameters for electrical connectivity, achieving manufacturing precision without excessive complexity.
Solution Approach 2:
Instead of changing the electrode pattern in the planar dimension, the solution addresses the void problem by modifying the electrode geometry in the vertical dimension through diameter variation along its length. This dimensional approach enables uniform ILD deposition while keeping the planar layout simple.
Data Source
AI summary
Embodiments of the invention include a semiconductor structure with a first magneto-resistive random access memory (MRAM) pillar with a bottom electrode layer, a reference layer connected above the bottom electrode layer, a free layer, and a tunnel barrier between the reference layer and the free layer. The MRAM pillar includes a pillar diameter. The semiconductor structure also includes a coaxial top electrode with a top diameter that is less than the pillar diameter.