Coherency Domain Indicators for Cache Bandwidth Optimization
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Solution Overview
Problem
Conventional cache coherent data processing systems face scalability issues due to the requirement of global broadcast of coherency messages, which consumes increasing bandwidth as systems scale, hindering performance.
Innovation Solution
Implementing coherency domains where a master performs broadcasts within limited scopes, expanding only if necessary, and using domain indicators to determine broadcast scope, thereby reducing unnecessary communication bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If global broadcast of coherency messages is used to maintain cache coherency, then cache coherency is ensured across all processor cores, but system scalability deteriorates due to increasing bandwidth consumption
Solution Approach 1:
The system divides the multiprocessor system into multiple coherency domains, where each domain is a subset of processor cores that share cache coherency requirements. This segmentation allows coherency messages to be broadcast only within relevant domains rather than globally to all cores, reducing bandwidth consumption and improving scalability while maintaining coherency within each domain.
Solution Approach 2:
The patent implements domain indicators in cache directories that mark whether cached memory blocks are local to a specific coherency domain. This local quality marking enables masters to determine whether to broadcast coherency messages globally or only within the local domain, optimizing bandwidth usage based on the actual coherency requirements of each memory block.
2Reliability
If global broadcast of coherency messages is implemented, then cache coherency is maintained, but communication bandwidth is excessively consumed
Solution Approach 1:
By segmenting the system into coherency domains, the patent reduces the scope of coherency message broadcasts from global to domain-local. This segmentation ensures that coherency information is transmitted only to the necessary subset of processors, significantly reducing communication bandwidth consumption while maintaining coherency within each domain.
Solution Approach 2:
The domain indicator mechanism marks memory blocks with local coherency characteristics, enabling the system to transmit coherency messages only to relevant domains rather than broadcasting to all processors. This local quality approach minimizes unnecessary bandwidth consumption while ensuring coherency is maintained where required.
Data Source
AI summary
In a cache coherent data processing system including at least first and second coherency domains, a memory block is stored in a system memory in association with a domain indicator indicating whether or not the memory block is cached, if at all, only within the first coherency domain. A master in the first coherency domain determines whether or not a scope of broadcast transmission of an operation should extend beyond the first coherency domain by reference to the domain indicator stored in the cache and then performs a broadcast of the operation within the cache coherent data processing system in accordance with the determination.