Multi-Step Column Driver Circuitry for Long Memory Select Lines

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Solution Overview

Problem

The increased resistance and parasitic capacitance of column select lines in memory banks due to longer lengths, particularly for memory cells far from the column decoder, lead to reduced voltage and current levels, affecting access efficiency.

Innovation Solution

The implementation of column driver circuitry that adjusts voltage levels and durations of column select signals based on the distance of target memory cells from the decoder, using multiple voltage steps and ground terminal coupling to compensate for resistance and capacitance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If additional memory cells are arranged along the columns and rows to increase storage capacity, then the storage capacity of the memory bank is improved, but the length of the column select lines and row select lines increases, leading to increased resistance and parasitic capacitance

Engineering Contradiction:
Improvestorage capacityVSAvoidlength of column select lines
Core Design Contradiction:
Quantity of substanceVSLength of stationary object

Solution Approach 1:

The memory bank is divided into multiple segments along the column direction, with each segment served by a dedicated column driver circuit. This segmentation allows shorter select lines to be used within each segment, reducing resistance and parasitic capacitance while still achieving high storage capacity through the combined segments.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Column driver circuits are introduced as intermediary components between the column decoder and the memory cells. These driver circuits actively compensate for the increased resistance and parasitic capacitance of longer select lines by providing signal boosting and impedance matching, enabling the system to maintain performance with increased storage capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If the length of column select lines is increased to access far memory cells, then the coverage of the memory bank is improved, but the resistance and parasitic capacitance increase, reducing voltage and current levels

Engineering Contradiction:
Improvecoverage of memory bankVSAvoidvoltage and current levels
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The column driver circuits dynamically adjust the voltage and current parameters of the column select signals based on the distance to the target memory cells. By changing the signal parameters (voltage level, drive strength) according to the specific segment being accessed, the system maintains reliable signal levels across the entire memory bank regardless of line length.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If column driver circuitry is added to compensate for resistance and parasitic capacitance, then the voltage and current levels for far memory cells are improved, but the device complexity increases

Engineering Contradiction:
Improvevoltage and current levelsVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The column driver circuits are designed with multi-functionality, serving multiple purposes: signal boosting, impedance matching, and compensation for parasitic effects. By making these circuits universal components that handle multiple functions, the overall device complexity is managed more efficiently rather than requiring separate dedicated circuits for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS20260004831A1Driver circuitry for high-density memory banks
Publication Date: 2026.01.01 MICRON TECHNOLOGY INC
  • US20260004831A1 patent drawing
  • US20260004831A1 patent drawing
  • US20260004831A1 patent drawing

AI summary

This disclosure is directed to column driver circuitry of a memory device. A memory bank of the memory device may include multiple memory cells arranged along multiple column select lines and row select lines. The column driver circuitry may include column drivers coupled to the column select lines. A column driver may generate a column select signal with multiple voltage steps for accessing a target memory cell coupled to a respective column select line. The column decoder may include circuitry to adjust a voltage level and/or duration of each voltage step of the column select signal to provide a desired voltage level to a target memory cell based on a disposition of the target memory cell along a column select line. For example, the column decoder may output a higher voltage level followed by a lower voltage level to access the target memory cell. The higher voltage level and the lower voltage level may be above a threshold voltage level for accessing the target memory cell.