High-Voltage Column Multiplexor for RRAM Leakage Control

Solution Overview

Problem

RRAM-based memories suffer from parasitic leakage currents during programming due to low power devices operating outside their safe operating area (SOA), leading to increased power consumption, reduced accuracy, and limited programming rate.

Innovation Solution

A multiplexing circuit with parallel branches using low voltage N-type and P-type field effect transistors (NFETs and PFETs) to manage program, erase, and read operations, ensuring all transistors operate within their safe operating area, reducing leakage currents.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If low power devices (1.8V) are used in the multiplexor, then power consumption is reduced, but the devices operate outside their safe operating area (SOA) causing damage and increased leakage currents

Engineering Contradiction:

Improvepower consumptionVSAvoiddevice operation reliability

Core Design Contradiction:

Use of energy by moving objectVSReliability

Solution Approach 1:

The multiplexor is divided into two separate parallel branches: a first parallel branch for program and read operations, and a second parallel branch for erase operations. This segmentation allows different voltage levels to be applied to different branches, enabling low voltage devices to operate within their SOA while still achieving the required functionality.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different voltage levels are applied to different parts of the circuit. The first parallel branch operates at low voltage (1.8V) for program and read operations, while the second parallel branch operates at high voltage (3.6V) for erase operations. This local quality approach ensures that low power devices operate within their safe operating area while still achieving the required functionality.

Inventive Principle:

Principle #3Local quality

2Reliability

If high voltage (3.6V) devices are used in the multiplexor, then safe operating area is maintained, but power consumption increases

Engineering Contradiction:

Improvedevice operation reliabilityVSAvoidpower consumption

Core Design Contradiction:

ReliabilityVSUse of energy by moving object

Solution Approach 1:

The multiplexor is divided into two separate parallel branches: a first parallel branch for program and read operations, and a second parallel branch for erase operations. This segmentation allows different voltage levels to be applied to different branches, enabling low voltage devices to operate within their SOA while still achieving the required functionality.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different voltage levels are applied to different parts of the circuit. The first parallel branch operates at low voltage (1.8V) for program and read operations, while the second parallel branch operates at high voltage (3.6V) for erase operations. This local quality approach ensures that low power devices operate within their safe operating area while still achieving the required functionality.

Inventive Principle:

Principle #3Local quality

3Reliability

If additional circuitry is added to protect stressed devices, then device integrity is maintained, but device complexity increases

Engineering Contradiction:

Improvedevice integrityVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The multiplexor is divided into two separate parallel branches: a first parallel branch for program and read operations, and a second parallel branch for erase operations. This segmentation allows different voltage levels to be applied to different branches, enabling low voltage devices to operate within their SOA while still achieving the required functionality.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different voltage levels are applied to different parts of the circuit. The first parallel branch operates at low voltage (1.8V) for program and read operations, while the second parallel branch operates at high voltage (3.6V) for erase operations. This local quality approach ensures that low power devices operate within their safe operating area while still achieving the required functionality.

Inventive Principle:

Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively prevents leakage currents, maintains device integrity, and enhances programming accuracy and speed by using low voltage devices that do not exceed their safe operating limits, eliminating the need for additional circuitry.

Implementation Method 1

a first parallel branch including a plurality of N-type field effect transistors (NFETs), wherein the first parallel branch: couples a program voltage to a bitline corresponding to a bit cell of the memory during a program mode of the memory

Methodology Applied

Scientific EffectField effect transistor operation:

Data Source

PatentUS12525287B2High voltage column multiplexor

Publication Date: 2026.01.13 GLOBALFOUNDRIES US INC

AI summary

A multiplexing circuit for a memory, including: a first parallel branch for coupling a program voltage to a first bitline corresponding to a first bit cell of the memory during a program mode of the memory; and a second parallel branch for coupling a program inhibit voltage to a plurality of additional bitlines corresponding to a plurality of additional bit cells of the memory during a program inhibit mode of the memory, wherein the first parallel branch couples an erase inhibit voltage to the plurality of additional bitlines during an erase inhibit mode of the memory, and wherein the second parallel branch couples an erase voltage to the first bitline during an erase mode of the memory.