Combinatorial Encoding for PCM Stuck-At Fault Correction
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Solution Overview
Problem
Phase change memory (PCM) devices experience high error rates due to degradation, which are different from random errors in data communication systems, and existing error correction methods are inadequate for correcting stuck-at faults in non-volatile memory devices.
Innovation Solution
A data storage system that uses a control circuit to compute binomial coefficients for stuck-at faults in memory cells, generating redundant bits through a combinatorial number system to encode and decode data bits, effectively correcting errors caused by stuck-at faults.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional error correction encoding is used for PCM devices, then random errors can be corrected, but stuck-at faults caused by degradation cannot be effectively corrected
Solution Approach 1:
The patent changes the fundamental parameter of error correction from treating all errors as random bit flips to distinguishing between random errors and stuck-at faults. The encoding scheme parameters are adjusted to accommodate the specific statistical properties of PCM degradation errors, using binomial coefficients tailored to the actual error patterns observed in phase change memory.
Solution Approach 2:
The patent segments the error correction approach by separating the handling of random errors from stuck-at faults. The encoding scheme divides redundant bits into different functional groups: some for detecting random errors and others specifically for identifying and correcting stuck-at faults at known locations.
2Reliability
If more redundant bits are added to correct degradation errors, then error correction capability improves, but storage efficiency decreases
Solution Approach 1:
The patent applies partial action by adding only the minimum necessary redundant bits to correct the most common and critical error types in PCM. Rather than providing full protection against all possible error patterns, the scheme focuses on correcting stuck-at faults at predetermined locations and random errors up to a certain threshold, achieving acceptable reliability with fewer redundant bits.
Solution Approach 2:
The encoding parameters are optimized for the specific error characteristics of PCM degradation. By using binomial coefficients that match the actual error distribution in phase change memory, the scheme achieves efficient error correction with minimal overhead, adapting the redundancy level to the actual reliability requirements.
3Reliability
If existing error correction methods are applied to non-volatile memory, then random errors are handled, but the unique statistics of degradation-induced errors are not addressed
Solution Approach 1:
The patent applies local quality by tailoring the error correction scheme to the specific local characteristics of PCM degradation. Different portions of the memory array may have different predetermined stuck-at fault locations based on observed degradation patterns. The encoding adapts to local error statistics rather than applying a uniform correction approach across all memory cells.
Solution Approach 2:
The patent uses preliminary action by pre-identifying and recording the locations of stuck-at faults before data storage. During encoding, these predetermined fault locations are used to generate specific redundant bits that anticipate where errors are most likely to occur. This preliminary characterization of degradation patterns enables more effective correction without requiring complex real-time analysis.
Data Source
AI summary
A data storage system includes a memory circuit having memory cells and a control circuit. The control circuit is operable to receive data bits provided for storage in the memory cells. A subset of the memory cells have predetermined stuck-at faults. The control circuit is operable to compute a binomial coefficient for each of the predetermined stuck-at faults based on a bit position of a corresponding one of the predetermined stuck-at faults within the memory cells. The control circuit is operable to add together the binomial coefficients to generate an encoded number using a combinatorial number system. The control circuit is operable to generate a first set of redundant bits that indicate the encoded number. The first set of redundant bits are used to decode bits read from the memory cells to regenerate the data bits.