Common-Mode Signaling for Burst-Error-Resistant Serial Links
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Solution Overview
Problem
High-speed serial links face challenges in mitigating burst errors due to inter-symbol interference, where decision feedback equalization can exacerbate errors, and large interleavers required for error correction are costly and memory-intensive.
Innovation Solution
A method and system that segment data into blocks, calculate burst error probability, and use common-mode signaling to transmit modification signaling bits, allowing for bit inversion in blocks with high error probability, thereby reducing the likelihood of burst errors through differential and common-mode signaling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a large interleaver is used to accommodate medium-length burst errors, then burst error correction capability is improved, but memory requirements and cost increase significantly
Solution Approach 1:
The data stream is divided into blocks of m bits, with each block processed independently. A modification signaling bit is added to each block to indicate whether bit inversion has been applied. This segmentation allows the system to handle burst errors locally within blocks rather than requiring a large interleaver to span the entire data stream, significantly reducing memory requirements while maintaining burst error correction capability.
Solution Approach 2:
The system performs preliminary detection of alternating bit sequences (which are vulnerable to burst errors) before transmission. When such sequences are detected, the system proactively inverts bits in advance and sets the modification signaling bit. This preliminary action prevents burst errors from occurring in the first place, eliminating the need for large interleavers and extensive memory resources for error correction.
2Measurement precision
If decision feedback equalization is used to compensate for inter-symbol interference, then signal quality is improved, but susceptibility to burst errors increases
Solution Approach 1:
The system applies preliminary anti-action by detecting alternating bit sequences that are prone to burst errors and inverting bits before transmission. This preemptive measure counteracts the vulnerability created by DFE, preventing burst errors from propagating through the equalization process. The modification signaling bit enables the receiver to correctly interpret the inverted sequences, maintaining signal quality while eliminating burst error susceptibility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively mitigates burst errors by inverting bits in vulnerable blocks and transmitting modification signaling bits, reducing the need for large interleavers and minimizing error propagation, thus enhancing the reliability of high-speed serial links without increasing memory requirements.
Implementation Method 1
transmitting the modification signaling bit on the serial channel includes transmitting the modification signaling bit on the serial channel utilizing common-mode signaling
Implementation Method 2
transmitting the output block on the serial channel includes transmitting the output block on the serial channel utilizing differential signaling
Data Source
AI summary
A method for transmitting an input stream of data across a serial link including a serial channel. The method includes segmenting the stream of data into blocks of bits to form input blocks, and for each input block, calculating a measure of burst error probability, forming an output block and a modification signaling bit from the input block, transmitting the output block, and transmitting the modification signaling bit. The forming of the output block and the modification signaling bit from the input block includes, when the measure of burst error probability exceeds a set threshold: modifying the input block to form the output block, and asserting the modification signaling bit.


