Common-Mode Translation Circuit for Sigma-Delta ADC Inputs
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Solution Overview
Problem
Continuous-time sigma-delta analog-to-digital converters face reliability issues due to mismatched common mode levels between input signals and the converter's operation, leading to potential degradation in performance, especially when the common mode level exceeds the supply voltage or during start-up and power supply loss.
Innovation Solution
A system and method for common mode translation in continuous-time sigma-delta ADCs, incorporating a loop filter with an input RC network, a Gm-C/Quantizer/DAC circuit, a common mode level adjust circuit, and a tuning circuit that adjusts the common mode level to match the desired level by using current supplies and a compensation voltage based on the difference between the input and desired common mode levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the common mode level of the input signal is adjusted to match the desired level, then reliability is improved, but device complexity increases due to the need for additional common mode level adjust circuit and tuning circuit
Solution Approach 1:
The patent introduces a common mode level adjust circuit that acts as an intermediary between the input signal and the Gm-C/Quantizer/DAC circuit. This intermediary circuit translates the common mode level of the input signal to match the desired common mode level, preventing reliability issues without requiring fundamental changes to the existing converter architecture.
Solution Approach 2:
The patent implements a tuning circuit that uses feedback mechanisms to automatically adjust the common mode level. The tuning circuit monitors the common mode level and makes real-time adjustments to maintain the desired level, improving reliability while minimizing the need for manual intervention and reducing overall system complexity.
2Device complexity
If the common mode level is kept identical to the input signal level, then device complexity is reduced, but reliability deteriorates when the common mode level exceeds the supply voltage or during start-up and power supply loss
Solution Approach 1:
The common mode level adjust circuit performs preliminary action by pre-adjusting the common mode level of the input signal before it reaches the Gm-C/Quantizer/DAC circuit. This prevents potential reliability issues from occurring in the first place, rather than dealing with them after they arise. The circuit ensures the common mode level is always within acceptable ranges even during start-up or power supply loss conditions.
3Manufacturing precision
If a low-voltage process is used for fabrication, then manufacturing precision is improved, but reliability worsens due to high common mode level exceeding the supply voltage
Solution Approach 1:
The patent changes the parameter of common mode level through the common mode level adjust circuit. By dynamically adjusting this parameter, the system can accommodate low-voltage fabrication processes while preventing the common mode level from exceeding the supply voltage, thus maintaining both manufacturing precision and reliability.
Data Source
AI summary
System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC network coupled to a differential signal input, a Gm-C/Quantizer/DAC circuit (GQD) coupled to the loop filter, a common-mode level adjust circuit coupled to signal inputs of the GQD, and a tuning circuit coupled to the GQD and the common-mode level adjust circuit. The GQD evaluates an input signal provided by the RC network, computes a difference between a filtered input signal and the feedback quantization signal to generate an error signal, measures the error signal, and compensates for the error signal with sigma-delta noise-shaping. The common-mode level adjust circuit alters a common-mode level of a differential input signal to be substantially equal to a desired common-mode level and the tuning circuit provides a compensation voltage to the common-mode level adjust circuit based on a difference between the common-mode levels.