Common Refresh Delay Unit for Semiconductor Bank Control

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Solution Overview

Problem

Conventional active control devices in semiconductor memory systems require additional RC delay units for each bank to control RAS access time during refresh operations, leading to increased area and complexity.

Innovation Solution

A common refresh delay unit is used to control the delay operation for all banks during refresh operations, reducing the area and complexity by eliminating the need for separate delay units in each bank.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If additional RC delay units are added to each bank for controlling RAS access time during refresh operations, then the control precision for each bank is improved, but the area of the active control device increases

Engineering Contradiction:
Improvecontrol precisionVSAvoidarea
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent merges the delay control function from individual bank-level RC delay units into a single refresh control unit that serves all banks. The refresh control unit generates a refresh start signal that is distributed to multiple banks, eliminating the need for separate delay units in each bank while maintaining synchronized refresh timing across all banks.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The refresh control unit is designed as a universal component that can control refresh operations for multiple banks simultaneously. It generates a single refresh start signal that is distributed to all banks, making the delay control mechanism multi-functional rather than dedicated to each individual bank.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If separate delay units are provided for each bank, then the reliability of individual bank control is improved, but the device complexity increases

Engineering Contradiction:
ImprovereliabilityVSAvoidcomplexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple separate delay control circuits into a single refresh control unit. This unified structure reduces the overall complexity of the active control device while maintaining reliable refresh timing control through centralized signal generation and distribution to all banks.

Inventive Principle:
Principle #5Merging (Combining)

3Area of stationary object

If a common refresh delay unit is used for all banks, then the area is reduced, but the adaptability for individual bank control may be compromised

Engineering Contradiction:
ImproveareaVSAvoidadaptability
Core Design Contradiction:
Area of stationary objectVSAdaptability or versatility

Solution Approach 1:

The refresh control unit is designed as a universal controller that can adapt to control multiple banks through a common interface. It generates refresh start signals that are distributed to all banks, providing area-efficient control while maintaining the ability to independently manage refresh operations across different banks through signal distribution and timing control.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9196350B2Active control device, semiconductor device and system including the same
Publication Date: 2015.11.24 MIMIRIP LLC
  • US9196350B2 patent drawing
  • US9196350B2 patent drawing
  • US9196350B2 patent drawing

AI summary

Disclosed herein are an active control device, a semiconductor device and system including the same. The active control device may include a refresh control unit configured for outputting a refresh signal by controlling a delay time for a refresh start time when a refresh operation is performed and a precharge signal generation unit configured for generating a bank precharge signal for precharging a bank in response to the refresh signal. The refresh control unit may include a refresh delay unit for delaying a bank-active signal for a specific time and outputting a delay signal, and the refresh delay unit may be operably coupled with a plurality of banks in common.