Common Word Line Structure for 3D Nonvolatile Memory Integration
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Solution Overview
Problem
Conventional 3D nonvolatile memory devices face challenges in forming a large number of metal interconnections between word lines and pass transistors due to the stacking structure, which limits the integration density and increases the difficulty of ensuring sufficient area for pass transistor regions.
Innovation Solution
The proposed solution involves forming a stack of common word lines that extend from one cell region to another, with slim regions defined by partial etching, allowing for easier coupling of word lines and pass transistors, even with an increased number of layers, by creating a stepped structure that exposes conductive layers for efficient metal interconnections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If word lines are formed in a stacking structure to increase integration density, then the degree of integration is improved, but the number of metal interconnections required increases making formation difficult in limited space
Solution Approach 1:
The patent merges the functions of multiple local word lines into a single common word line that extends across both cell regions. This consolidation reduces the number of metal interconnections from multiple separate lines to one shared line, thereby maintaining integration density while significantly reducing interconnection complexity and the number of contacts required in the pass transistor region.
Solution Approach 2:
The common word line serves multiple functions by simultaneously acting as the word line for both first and second cell regions. This multi-functional design allows a single interconnection structure to replace what would traditionally require multiple separate interconnections, resolving the contradiction between high integration density and reduced interconnection complexity.
2Quantity of substance
If the number of word line layers is increased to improve integration, then storage capacity is improved, but the area required for pass transistor region increases making it difficult to ensure sufficient space
Solution Approach 1:
By merging the word lines of multiple cell regions into a single common word line structure, the patent reduces the number of separate metal interconnections that would otherwise be required. This consolidation decreases the area occupied by interconnections in the pass transistor region, allowing sufficient space to be maintained even as the number of word line layers increases to improve storage capacity.
3Reliability
If local word lines are used to couple word lines and pass transistors, then electrical connection is achieved, but the number of contacts increases proportionally with the number of word line layers
Solution Approach 1:
The patent merges multiple local word line connections into a single common word line that provides electrical connection to both cell regions. This reduces the number of contacts required from multiple separate connections to a minimal number of contacts for the shared common word line, thereby maintaining reliable electrical connection while significantly reducing contact complexity.
Data Source
AI summary
A 3D nonvolatile memory device including memory cells vertically stacked is disclosed. Word lines are integrally formed to be elongated over adjacent cell regions spaced apart from each other, and portions of the word lines between the cell regions are partially etched in a stepped shape to form word line contact regions.