Common Write Driver for Semiconductor Memory Banks

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Solution Overview

Problem

The existing semiconductor memory devices have a large area occupancy due to the need for a write driver for each memory bank, which increases the overall size and cost of the device.

Innovation Solution

A common write driver is introduced that can selectively drive write data to both memory banks, reducing the number of write drivers required and occupying a smaller area by using a common write control block and drive block to manage transmission lines for multiple memory banks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a write driver is provided for each memory bank, then the reliability of data writing is improved, but the area occupied by internal circuits increases

Engineering Contradiction:

Improvedata writing reliabilityVSAvoidarea occupied by write drivers

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The write driver is designed as a multi-functional unit that can serve multiple memory banks through shareable transmission lines. The same write driver circuitry can be reused across different memory banks, reducing the total number of write drivers needed while maintaining reliable data writing capability through proper signal routing and timing control.

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

Multiple write drivers are merged into a single shared write driver unit that can operate with different memory banks. The transmission lines are configured to be shared between multiple memory banks, combining what were previously separate write driver functions into one integrated unit that reduces overall circuit area.

Inventive Principle:

Principle #5Merging (Combining)

2Area of stationary object

If the number of write drivers is reduced, then the area occupied by internal circuits is decreased, but the complexity of controlling multiple memory banks increases

Engineering Contradiction:

Improvearea occupied by write driversVSAvoidcontrol complexity

Core Design Contradiction:

Area of stationary objectVSDevice complexity

Solution Approach 1:

The control function is segmented into separate control signals that can be independently generated and routed to the shared write driver. By dividing the control logic into manageable segments, the complexity of controlling multiple memory banks is reduced while still enabling proper operation of the shared write driver across different banks.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Control signals act as intermediaries between the control logic and the shared write driver. These intermediary signals simplify the control architecture by providing a clear interface that manages the complexity of routing write operations to different memory banks without requiring complex direct control paths.

Inventive Principle:

Principle #24Intermediary (Mediator)

Data Source

PatentUS8120973B2Write driver of semiconductor memory device

Publication Date: 2012.02.21 SK HYNIX INC

AI summary

A semiconductor memory device includes a first memory bank and a second memory bank and a common write driver configured to drive write data to an activated memory bank of the first memory bank and the second memory bank. The common write driver of the semiconductor memory device includes a common write control block configured to generate common drive control signals corresponding to write data, and a common write drive block configured to drive transmission lines of a first memory bank or transmission lines of a second memory bank that are selected by a bank selection signal in response to the common drive control signals.