Compact RRAM Structure With Embedded Diode For High Density Memory
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Solution Overview
Problem
The scaling of flash memory devices is hindered by challenges such as program/erase voltage scaling, access speed, reliability, and charge storage in integrated circuits, necessitating the development of more efficient non-volatile memory solutions like RRAM devices with a compact structure.
Innovation Solution
A compact RRAM device with an embedded Si-diode structure is developed, featuring a substrate with diffusion regions of opposite polarity dopants forming a diode, a variable resistance layer, and conductive bit and word lines, allowing for a contact-less unit cell configuration that enables efficient data storage and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If flash memory structures are scaled down to reduce device size, then integration density improves, but program/erase voltage scaling becomes difficult and reliability deteriorates
Solution Approach 1:
The patent transitions from charge-based storage (flash memory) to resistance-based storage (RRAM), fundamentally changing the physical parameter used for data storage. This allows scaling to smaller dimensions while maintaining reliable switching behavior through resistive changes rather than charge trapping, which becomes unreliable at scaled dimensions.
Solution Approach 2:
The patent replaces the mechanical/electrical charge trapping mechanism of flash memory with an electrical resistance switching mechanism in RRAM. The variable resistance material layer switches between high and low resistance states through electrical pulses, eliminating the need for complex stacked gate structures and charge storage mechanisms that fail at scaled dimensions.
2Area of stationary object
If flash memory structures are scaled down, then device footprint reduces, but access speed decreases
Solution Approach 1:
The patent replaces the slow charge trapping and detrapping processes in flash memory with fast resistance switching in the variable resistance material layer. The SET and RESET operations occur through rapid formation and breakdown of conductive filaments, achieving much faster access speeds at scaled dimensions.
Solution Approach 2:
The patent changes the storage mechanism from charge-based (slow tunneling processes) to resistance-based (fast filament formation/breakdown), enabling rapid read, write, and erase operations even in highly scaled devices with reduced footprint.
3Ease of manufacture
If traditional flash memory structures are used, then manufacturing process is well-established, but device complexity increases and integration density decreases
Solution Approach 1:
The patent transitions from planar flash memory structures to vertically-stacked RRAM structures with variable resistance material layers positioned between bit line and word line electrodes. This three-dimensional configuration reduces the lateral cell footprint while maintaining manufacturing compatibility through sequential layer deposition and patterning.
Solution Approach 2:
The patent extracts the complex stacked gate structure (tunnel oxide, floating gate, inter-gate dielectric, control gate) from flash memory and replaces it with a simplified RRAM structure consisting of variable resistance material between two electrodes, significantly reducing cell area while easing manufacturing complexity.
4Area of stationary object
If variable resistance material layer is used for data storage, then integration density improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent employs a single variable resistance material layer that serves multiple functions: data storage through resistance switching, diode formation when combined with doped semiconductor regions, and integration with standard CMOS processes. This multi-functionality reduces the need for multiple specialized layers and their associated precision requirements.
Solution Approach 2:
The patent utilizes the inherent properties of variable resistance materials that can be deposited using standard sputtering or evaporation techniques without requiring atomic-layer precision. The resistance switching behavior emerges from the material's intrinsic properties and formation processes, tolerating broader manufacturing parameter variations compared to tunnel oxide thickness control in flash memory.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The compact RRAM device with a diode structure enhances integration density and access speed while maintaining reliability, addressing the limitations of traditional flash memory devices by utilizing a variable resistance layer that changes resistivity in response to electric signals.
Implementation Method 1
The electric field strength or electric current density from the pulse or pulses, is sufficient to switch the physical state of the material so as to modify the properties of the material and establish a highly localized conductive filament in the variable resistance material
Implementation Method 2
A high voltage, high current process, a so-called FORMING process, is performed to create the localized conductive filament with oxygen vacancies from the cathode
Implementation Method 3
A doped layer is disposed on the substrate. The doped layer and bottom electrode form a diode
Data Source
AI summary
A RRAM device having a diode device structure coupled to a variable resistance layer is disclosed. The diode device structure can either be embedded into or fabricated over the substrate. A memory device having an array of said RRAM devices can be fabricated with multiple common bit lines and common word lines.