Compact Signal Averager Circuit for Dynamic Range and SCF Compatibility
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Solution Overview
Problem
Current Solid State Area Array Imaging Devices (SSAAIDs) face limitations in dynamic range, leading to poor image quality in both low and high light conditions due to saturation and noise issues, and existing Compact Signal Averager (CSA) circuits are not compatible with switched capacitor filter circuits, limiting their effectiveness.
Innovation Solution
A compact signal averaging circuit is designed to be compatible with switched capacitor filter circuits, incorporating additional Field Effect Transistors (FETs) to enhance dynamic range and fit on a single pixel, allowing for switching between CSA and SCF operations, with a configuration that includes a switched capacitor filter and P-Type FETs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If existing Compact Signal Averager (CSA) circuits are used, then short-duration transient noise is suppressed, but the circuits are not compatible with switched capacitor filter circuits and have very limited dynamic range
Solution Approach 1:
The patent combines the Compact Signal Averager (CSA) circuit with a switched capacitor filter circuit into a single integrated pixel structure. The CSA circuit includes a summing node with a summing capacitor, while the switched capacitor filter circuit is coupled to the same node, allowing both functions to coexist and operate within the same pixel without requiring separate dedicated circuits for each function.
Solution Approach 2:
The patent creates a multi-functional pixel that can perform both signal averaging and switched capacitor filtering operations. The circuit is designed with shared components and nodes that allow it to adaptively switch between different operating modes (CSA mode and SCF mode), providing universal functionality that addresses multiple signal processing needs within a single pixel structure.
2Object-affected harmful factors
If existing Compact Signal Averager (CSA) circuits are used, then transient noise is suppressed, but the dynamic range is very limited
Solution Approach 1:
The patent merges the CSA circuit with additional switched capacitor filter circuitry and multiple capacitors (summing capacitor, hold capacitor, filter capacitors) to create an extended dynamic range. The combination of these capacitive elements and the integrated circuit architecture allows the system to handle a broader range of signal amplitudes while maintaining transient noise suppression capabilities.
3Reliability
If integration circuit capacity is increased to prevent saturation in high light level conditions, then high light level performance is improved, but the circuit becomes larger and cannot fit on a single pixel with switched capacitor filter circuit
Solution Approach 1:
The patent integrates multiple functions (signal averaging, filtering, and high light level handling) into a single compact pixel structure by merging the CSA circuit with switched capacitor filter circuitry. This integration allows the circuit to achieve enhanced high light level performance through the combined capacitive storage capacity of the summing capacitor, hold capacitor, and filter capacitors, all within the constraints of a single pixel footprint.
Solution Approach 2:
The patent employs a nested architecture where the switched capacitor filter circuit is coupled to and integrated with the CSA circuit within the same pixel. The filter circuit components are effectively nested within the overall pixel structure, allowing multiple layers of signal processing functionality to coexist in a space-efficient manner that maintains high light level performance without exceeding pixel area constraints.
4Reliability
If shorter integration times are used to provide better high light performance, then saturation is reduced, but sensitivity decreases and low light level conditions cannot be captured
Solution Approach 1:
The patent implements a dynamic circuit architecture that can adaptively adjust its integration time and signal processing mode based on the input signal conditions. The circuit can switch between CSA mode and SCF mode, and the integrated capacitive structure allows it to effectively extend integration time for low light conditions while preventing saturation in high light conditions, providing dynamic optimization of both sensitivity and saturation resistance.
Data Source
AI summary
A compact signal averaging circuit having an input, a first switch operatively connected to the input, a second switch operatively connected to the first switch, wherein the first switch is coupled to the circuit between the input and the second switch, a first FET having a gate, a source and a drain, wherein the gate is operatively connected to the circuit between the first switch and the second switch, a second FET comprising a gate, a source and a drain, wherein the source is operatively connected to a voltage supply and to the second switch, and an output operatively connected to the first FET drain and the second FET drain.