Comparator Circuit With Positive Feedback and Current Limiting

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Solution Overview

Problem

In solid-state imaging devices, comparators in pixel columns face challenges in achieving high determination speed while maintaining low power consumption due to limited circuit accommodation area, leading to increased power consumption and reduced performance.

Innovation Solution

Incorporating a comparator with a comparison unit, a positive feedback circuit to enhance transition speed, and a current limiting unit to control current after inversion, along with a storage unit to store and output code signals, effectively reducing power consumption and increasing determination speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the comparator is designed to increase determination speed, then the determination speed is improved, but power consumption increases

Engineering Contradiction:
Improvedetermination speedVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The comparator circuit dynamically adjusts its operating state by switching between high-speed mode (during comparison) and low-power mode (after inversion). The positive feedback circuit is activated only during the transition period to boost speed, while the current limiting unit engages after inversion to reduce power consumption, making the circuit's characteristics adaptable to different operational phases.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The comparator operates in periodic cycles of high-current comparison phases followed by low-current standby phases. The positive feedback circuit provides periodic current boosting only when needed for transitions, while the current limiting unit enforces periodic current reduction after each comparison cycle completes, creating a rhythm of high-performance and low-power states.

Inventive Principle:
Principle #19Periodic action

2Area of stationary object

If the comparator circuit area is reduced to fit in pixel columns, then area efficiency is improved, but determination speed decreases

Engineering Contradiction:
Improvecircuit accommodation areaVSAvoiddetermination speed
Core Design Contradiction:
Area of stationary objectVSSpeed

Solution Approach 1:

The positive feedback circuit is pre-configured and ready to activate immediately when the comparison result inverts. By having the feedback path and additional current sources pre-positioned in the compact circuit layout, the circuit eliminates delays that would occur if these speed-enhancing elements needed to be activated or configured during the comparison process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The positive feedback circuit creates a regenerative effect that amplifies the comparison output signal during transitions. This feedback mechanism allows the compact comparator to achieve higher determination speeds by reinforcing its own output state changes, compensating for the speed limitations that would normally result from reduced circuit area.

Inventive Principle:
Principle #23Feedback

3Speed

If the comparator is designed for high determination speed, then the determination speed is improved, but device complexity increases

Engineering Contradiction:
Improvedetermination speedVSAvoidcomparator structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The positive feedback circuit and current limiting unit are integrated into the comparator's core structure rather than being separate external components. The feedback path merges with the existing output stage, and the current limiting unit is combined with the differential pair structures, creating a unified compact design that achieves high speed without proportionally increasing overall device complexity.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The enhanced speed characteristics are localized to specific critical regions of the comparator circuit - particularly at the output stage where the positive feedback is applied and at the differential pairs where current limiting is implemented. This localized optimization allows the rest of the comparator to maintain simpler structures, balancing overall device complexity with targeted performance improvements.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12015864B2Comparator, AD converter, solid-state imaging device, electronic apparatus, and method of controlling comparator
Publication Date: 2024.06.18 SONY GROUP CORP
  • US12015864B2 patent drawing
  • US12015864B2 patent drawing
  • US12015864B2 patent drawing

AI summary

The present disclosure relates to a comparator, an AD converter, a solid-state imaging device, an electronic apparatus, and a comparator control method that can reduce power consumption while increasing the determination speed of the comparator. The comparator includes a comparison unit, a positive feedback circuit, and a current limiting unit. The comparison unit compares the voltage of an input signal and the voltage of a reference signal, and outputs a comparison result signal. The positive feedback circuit increases the transition speed at the time when the comparison result signal is inverted. The current limiting unit limits the current flowing in the comparison unit after the inversion of the comparison result signal. The present disclosure can be applied to comparators, for example.