Comparator Input Circuit for Equalized Kickback Noise
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Solution Overview
Problem
In integrated circuits, particularly in comparators with stack-gate structures, internal nodes can induce unequal kickback noise when the comparator operates, degrading performance and leading to a poor signal-to-noise ratio (SNR) in analog-to-digital converters (ADCs) due to uncontrolled voltages during off-mode operations.
Innovation Solution
The introduction of a new circuit design where internal nodes of a differential pair of stack-gate transistors are connected or tied to a power-supply pin, and additional switches are used to ensure equal kickback noise generation when the comparator is turned on, allowing differential operation to cancel out this noise effectively.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If multiple stages of gates of transistors are stacked to form an equivalent transistor with long channel length, then input-offset and input-referred noise are reduced, but internal nodes induce unequal kickback noise that degrades comparator performance
Solution Approach 1:
The patent applies preliminary action by connecting switches to the internal nodes of the stack-gate transistors before the comparator operation. These switches are pre-configured to equalize the voltages at internal nodes during the off-mode (pre-charge operation), ensuring that when the comparator is turned on, the kickback noise from both sides is equal and can be effectively canceled by the differential operation.
Solution Approach 2:
The patent implements equipotentiality by using switches to connect internal nodes to common voltage references (such as power supply pins or ground) during the off-mode. This ensures that both sides of the differential pair have equal potentials at their internal nodes, creating symmetric conditions that result in equal kickback noise that the differential comparator can reject.
2Device complexity
If internal nodes of stack-gate transistors are left floating during off-mode operation, then device complexity is reduced, but uncontrolled voltages at internal nodes cause unequal kickback noise
Solution Approach 1:
The patent applies preliminary action by connecting switches to the internal nodes of the stack-gate transistors before the comparator operation. These switches are pre-configured to equalize the voltages at internal nodes during the off-mode (pre-charge operation), ensuring that when the comparator is turned on, the kickback noise from both sides is equal and can be effectively canceled by the differential operation.
Solution Approach 2:
The patent implements equipotentiality by using switches to connect internal nodes to common voltage references (such as power supply pins or ground) during the off-mode. This ensures that both sides of the differential pair have equal potentials at their internal nodes, creating symmetric conditions that result in equal kickback noise that the differential comparator can reject.
3Object-generated harmful factors
If switches are added to connect internal nodes to power-supply pin to ensure equal kickback noise, then kickback noise is reduced, but device complexity increases
Solution Approach 1:
The patent applies preliminary action by connecting switches to the internal nodes of the stack-gate transistors before the comparator operation. These switches are pre-configured to equalize the voltages at internal nodes during the off-mode (pre-charge operation), ensuring that when the comparator is turned on, the kickback noise from both sides is equal and can be effectively canceled by the differential operation.
Solution Approach 2:
The patent implements equipotentiality by using switches to connect internal nodes to common voltage references (such as power supply pins or ground) during the off-mode. This ensures that both sides of the differential pair have equal potentials at their internal nodes, creating symmetric conditions that result in equal kickback noise that the differential comparator can reject.
Data Source
AI summary
Circuits and methods for reducing and cancelling out kickback noise are disclosed. In one example, a circuit for a comparator is disclosed. The circuit includes: a first transistor group, a second transistor group, and a first switch. The first transistor group comprises a first transistor having a drain coupled to a first node, and a second transistor having a source coupled to the first node. Gates of the first transistor and the second transistor are coupled together to a first input of the comparator. The second transistor group comprises a third transistor having a drain coupled to a second node, and a fourth transistor having a source coupled to the second node. Gates of the third transistor and the fourth transistor are coupled together to a second input of the comparator. The first switch is connected to and between the first node and the second node.


