Comparator Offset Cancellation for Low-Power Sampled-Data Circuits

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Solution Overview

Problem

Operational amplifiers in sampled-data circuits face challenges in achieving sufficient open-loop gain, low noise, and fast settling times, especially with low power supply voltages and device gain limitations, which affect the accuracy and dynamic range of signal integration.

Innovation Solution

A comparator-based circuit with effective offset cancellation is introduced, utilizing a first amplifier, an offset capacitor, and control switches to manage voltage levels and noise averaging, allowing for reduced power consumption without degrading noise performance or speed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If operational amplifiers are designed to provide sufficient open-loop gain and fast settling time, then signal integration accuracy is improved, but power consumption increases and device gain limitations are exacerbated

Engineering Contradiction:
Improvesignal integration accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by pre-charging the sampling capacitor to a specific voltage level before the actual signal integration process. This preliminary voltage setup allows the operational amplifier to start from a known state, reducing the settling time required and thereby lowering the power consumption while maintaining integration accuracy.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the voltage parameter of the sampling capacitor dynamically - charging it to different voltage levels based on the signal characteristics. This parameter adjustment optimizes the operational amplifier's working point, allowing it to achieve the required gain and settling time with reduced power consumption.

Inventive Principle:
Principle #35Parameter changes

2Speed

If operational amplifiers are designed for fast settling time, then operation speed is improved, but open-loop gain and noise performance are degraded

Engineering Contradiction:
Improvesettling timeVSAvoidnoise performance
Core Design Contradiction:
SpeedVSMeasurement precision

Solution Approach 1:

By pre-charging the sampling capacitor to the appropriate voltage level before signal integration, the operational amplifier is given a head start, reducing the time needed to settle. This preliminary action allows faster operation without requiring the amplifier to work harder, thus maintaining noise performance.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If voltage sources are continuously active to maintain reference voltages, then zero-crossing detection accuracy is improved, but power consumption increases

Engineering Contradiction:
Improvezero-crossing detection accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by charging the sampling capacitor to the reference voltage level only during specific phases of the signal cycle, rather than continuously maintaining it. This periodic charging approach ensures accurate zero-crossing detection when needed while significantly reducing power consumption during other periods.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The sampling capacitor serves itself by being charged to the reference voltage level during the periodic action, eliminating the need for continuous active voltage sources. The capacitor maintains the reference voltage autonomously between charging cycles, reducing power consumption while preserving detection accuracy.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables accurate zero-crossing detection and offset cancellation in sampled-data circuits, reducing power consumption while maintaining high precision and speed, suitable for applications like analog-to-digital converters and delta-sigma converters.

Implementation Method 1

an offset capacitor operatively connected to the first amplifier

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS7843233B2Offset cancellation for sampled-data circuits
Publication Date: 2010.11.30 MAXIM INTEGRATED PROD INC
  • US7843233B2 patent drawing
  • US7843233B2 patent drawing
  • US7843233B2 patent drawing

AI summary

A comparator based circuit with effective offset cancellation includes first and second amplifiers and an offset capacitor operatively connected to the first and second amplifiers. An offset voltage source generates an offset voltage. A first switch connects the offset voltage source to ground during a first time period. The first amplifier generates an output voltage in response to the first switch connecting the offset voltage source to ground during the first time period. A second switch connects the offset capacitor to ground during a second time period. The first switch disconnects the offset voltage source from ground during a third time period, and the second switch disconnects the offset capacitor from ground during the third time period.