Compensated Current Sensing Checking Block for Non-Volatile Memory
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Solution Overview
Problem
Non-volatile memory devices face challenges in accurately verifying the programming of memory cells due to mismatched resistances and internal offsets between the page buffer area and the peripheral reference block, affecting the reliability of programming verification operations.
Innovation Solution
A compensated current sensing checking block is implemented, utilizing a current mirror, programming status input block, reference block, operational amplifier, and switched capacitors to compare voltage levels and compensate for resistance mismatches and internal offsets, ensuring accurate verification of programming failures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a current sensing checking block is used to verify programming of memory cells, then programming verification can be performed, but resistance mismatch and internal offset between page buffer area and peripheral reference block cause inaccurate verification
Solution Approach 1:
The patent applies preliminary action by performing offset calibration before the actual programming verification. A calibration sequence is executed where test patterns are written to reference cells, and the resulting voltage levels are measured and stored as calibration data. This preliminary calibration compensates for resistance mismatches and operational amplifier offsets, ensuring that subsequent programming verification uses accurate, compensated voltage levels rather than raw measurements that would be affected by circuit variations.
Solution Approach 2:
The patent implements feedback by using the calibration results to adjust the verification process. The measured voltage levels from the calibration phase are fed back into the system to determine compensation values. During programming verification, these compensation values are applied to correct the voltage level comparisons, creating a closed-loop system that continuously refines the accuracy of programming status detection based on actual hardware conditions.
2Ease of manufacture
If resistance mismatch between page buffer area and peripheral reference block is present, then device layout flexibility is maintained, but verification accuracy deteriorates
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the verification parameters based on measured calibration data. Instead of using fixed voltage thresholds that would be affected by resistance mismatches, the system changes the comparison parameters to compensated voltage levels derived from actual calibration measurements. This allows the same physical layout with its inherent resistance variations to achieve accurate verification by adapting the electrical parameters rather than changing the physical structure.
Data Source
AI summary
A non-volatile memory includes a current sensing checking block including a programming status input block comprising a plurality of sub-blocks connected with each other in parallel with respect to a first node; a reference block comprising a plurality of sub-blocks connected with each other in parallel with respect to a second node; an operational amplifier operable to compare voltage levels of the first node and the second node to determine whether a actual number of programming failures for a desired group of cells exceeds a reference number of allowable programming failures of the reference block.