Compensation Word Line Driver for SRAM Voltage Drop
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Solution Overview
Problem
In SRAM systems, the voltage drop along word lines due to increased resistance in smaller dimensions leads to reduced speed and increased power consumption, as access signals weaken as they travel farther from the word line driver, causing RC delays and inefficiencies in data access.
Innovation Solution
Implementing a dual-word line driver system where one driver feeds the access signal and the other supplies a feedback signal generated from recycled charges collected via bit lines and bit line bars, reducing the need for additional energy and compensating for voltage drops along the word lines, thus enhancing performance by reducing RC delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If word line resistance is reduced by increasing dimensions, then voltage drop is reduced, but packing density is reduced
Solution Approach 1:
The word line is divided into two segments: a first word line extending from the first word line driver to a first midpoint, and a second word line extending from the second word line driver to a second midpoint. This segmentation allows each word line to be shorter, reducing resistance and voltage drop while maintaining the overall array density.
Solution Approach 2:
A charge recycle mechanism acts as an intermediary between the bit lines/bit line bars and the word lines. It collects charges from unselected cells and redirects them to compensate for voltage drops in selected word lines, enabling shorter word lines with lower resistance without sacrificing density.
2Power
If word line driver is placed farther from SRAM cells, then access signal strength is improved at driver output, but voltage drop along word line increases
Solution Approach 1:
The word line is segmented into multiple sections with drivers positioned at different locations (first word line driver at one end, second word line driver at the other end). This segmentation reduces the length of each word line segment, minimizing voltage drop while maintaining strong signal output from both drivers.
Solution Approach 2:
The charge recycle mechanism provides feedback by collecting charges from unselected cells and redirecting them to compensate for voltage drops in selected word lines. This feedback loop maintains signal strength throughout the word line without requiring the driver to be positioned farther away.
3Loss of time
If word line length is reduced, then RC delay is reduced, but total word line resistance increases
Solution Approach 1:
The word line is divided into multiple shorter segments with drivers positioned at intervals. Each segment has lower resistance due to its shorter length, and the segmented structure reduces overall RC delay while the collective resistance of all segments remains manageable.
Solution Approach 2:
The charge recycle mechanism serves as an intermediary that compensates for resistance effects. By collecting and redirecting charges, it maintains signal integrity across the segmented word lines, reducing effective resistance without increasing the number of segments or overall complexity.
Data Source
AI summary
Memory systems are provided. In an embodiment, a memory device includes a word line driver coupled to a plurality of word lines, a recycle multiplexer coupled to a plurality of bit lines and a plurality of bit line bars, a memory cell array, and a compensation word line driver. The memory cell array includes a first end adjacent the word line driver, a second end away from the word line driver, and a plurality of memory cells. The compensation word line driver is disposed adjacent the second end of the memory cell array and coupled to the plurality of word lines. The recycle multiplexer is configured to selectively couple one or more of the plurality of bit lines or one or more of the plurality of bit line bars to the compensation word line driver.