Complementary Bit Redundancy With Voting Logic for SEU Prevention
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Solution Overview
Problem
Existing SEU prevention techniques, such as triple modular redundancy, are inadequate in defending against deliberate attacks and malicious actors, as they do not account for the vulnerabilities inherent in replicated circuit elements with known approximate distances.
Innovation Solution
The implementation of complementary 2(N)-bit redundancy in integrated circuits, which involves storing data values and their complementary values in separate registers and using voting logic to generate an output based on multiple input values, thereby minimizing the risk of single event upsets and enabling error detection and correction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If triple modular redundancy is used to prevent SEU, then reliability is improved, but device complexity increases and vulnerability to deliberate attacks remains
Solution Approach 1:
The patent inverts the traditional redundancy approach by storing complementary bit values (inverted logic states) instead of identical replicated values. This inversion ensures that a single SEU cannot flip both the original and complementary bits to the same erroneous state, thereby preventing SEU propagation while maintaining circuit compactness and reducing vulnerability to deliberate attacks that target known replicated structures.
Solution Approach 2:
The patent changes the parameter of redundancy from replicating identical bit values to storing complementary bit values with inverted logic states. This parameter change transforms the redundancy mechanism from vulnerable identical copies to protected complementary pairs, improving reliability against both natural SEUs and deliberate attacks while maintaining device complexity at acceptable levels.
2Reliability
If redundant circuit elements are segregated by fixed distance, then SEU resistance is improved, but adaptability to different attack scenarios deteriorates
Solution Approach 1:
The patent introduces dynamic voting logic that can adapt its behavior based on detected error patterns. The voting mechanism can dynamically adjust which redundant elements to trust and how to interpret complementary bit pairs, providing versatility against different attack scenarios while maintaining SEU resistance through the fundamental complementary storage structure.
Solution Approach 2:
The complementary redundancy structure serves multiple functions: it protects against natural SEUs through inverted logic state storage, resists deliberate attacks by obscuring the relationship between redundant elements, and enables adaptive error detection and correction through flexible voting logic. This multi-functionality provides both SEU resistance and adaptability to various threat scenarios.
3Ease of manufacture
If identical redundant elements are used, then manufacturing is simplified, but vulnerability to attacks increases
Solution Approach 1:
The patent applies asymmetry by storing complementary bit values with inverted logic states rather than identical values. This asymmetric storage approach maintains the simplicity of manufacturing redundant elements (as they are still structurally identical circuit elements) while fundamentally changing their logical relationship to prevent attackers from exploiting known patterns. The physical structure remains manufacturable, but the logical asymmetry provides security.
Data Source
AI summary
The present disclosure describes various aspects of complementary 2(N)-bit redundancy for single event upset (SEU) prevention. In some aspects, an integrated circuit includes a data storage element to store a data value, another data storage element to store a complementary data value, a multi-bit data storage element (e.g., a 2-bit storage element) to store both the data value and the complementary data value, and voting logic that may enable a complementary data storage scheme with inter-circuit redundancy to prevent SEU. Additionally, the voting logic of the integrated circuit may enable detection and correction of data value errors and/or enable programming of voting logic criteria, which may be implemented dynamically based on a type of SEU failures that are detected or corrected.