Majority/Minority Circuits TRIZ Cases
- Ferroelectric Majority-Gate Multiplier for Low-Power Logic
Non-linear polar capacitors enable majority-gate multiplier cells with fewer transistors, lower power use, and denser logic packing.
- Nanomagnet Majority-Gate Adder Circuit for Low-Power Logic
Using SOT-coupled majority gates, this case shows how nanomagnet adders cut CMOS power limits while maintaining stable arithmetic output.
- Non-Linear Polar Multiplier Cell With Integrated Majority-AND Logic
Using non-linear polar majority gates, this multiplier cell cuts transistor count, interconnect routing, power use, and circuit area.
- Ferroelectric Multiplier Cells With Fewer Transistors and Interconnects
Non-linear polar capacitors replace transistor-heavy CMOS multiplier logic, cutting area, power use, and interconnect length.
- Checkerboard Carry Save Multiplier Using Majority-Minority Gate Cells
Ferroelectric or paraelectric majority-minority gate cells cut transistor count, power use, and footprint in checkerboard carry save multipliers.