Complementary Non-Volatile Memory Cell Layout for Wider Sensing Margin
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Solution Overview
Problem
Existing non-volatile memory devices face challenges in achieving high performance and reliability, particularly in maintaining sufficient sensing margins during data storage and retrieval operations.
Innovation Solution
The implementation of a non-volatile memory device with a memory cell structure that includes a first and second sub-memory cell connected to different word and bit lines, sharing a common source line, and utilizing a sense amplifier to compare currents or voltages to read data, with programming and erasing operations tailored to enhance sensing margins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single sub-memory cell is used for data storage, then the device structure is simple, but the sensing margin is limited and reliability is reduced
Solution Approach 1:
The memory cell is divided into two sub-memory cells (first and second sub-memory cells) that share a common source line. This segmentation allows the sense amplifier to compare currents from both sub-memory cells, effectively doubling the sensing margin while maintaining a relatively compact structure through the shared source line architecture.
2Manufacturing precision
If voltage is applied to program both sub-memory cells simultaneously, then the programming process is simple, but the precision of data storage is reduced due to threshold voltage differences
Solution Approach 1:
Different voltage levels are applied to the first and second word lines during programming operations. This local differentiation in voltage application allows precise control over which sub-memory cell is programmed or erased, enabling accurate data storage despite inherent threshold voltage differences between cells.
3Measurement precision
If a sense amplifier compares currents from multiple bit lines, then the sensing margin increases, but the device complexity and voltage management burden increase
Solution Approach 1:
The first and second sub-memory cells share a common source line, which merges the voltage management requirements. This allows the sense amplifier to compare currents from both bit lines effectively while reducing the overall voltage management complexity, as the shared source line provides a common reference point for both comparisons.
Data Source
AI summary
A non-volatile memory device includes a memory cell which stores one of first data and second data, and includes a first sub-memory cell connected to a first word line and a first bit line, and a second sub-memory cell connected to a second word line and a second bit line, a source line shared by the first sub-memory cell and the second sub-memory cell, and a sense amplifier connected to the first bit line and the second bit line which reads data stored in the memory cell. The sense amplifier receives a first current from the first bit line, receives a second current from the second bit line, and reads data stored in the memory cell by comparing magnitudes of the first current and the second current. The first sub-memory cell is programmed, and the second sub-memory cell is erased, in response to the memory cell storing the first data.